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[MIPS] checkfiles: Fix "need space after that ','" errors.

Browse Source 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
2007-10-11 23:46:15 +01:00
parent 49a89efbbb
commit 21a151d8ca
121 changed files with 1951 additions and 1943 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/mips/au1000/common/dbdma.c
View File

@@ -213,7 +213,7 @@ au1xxx_ddma_add_device(dbdev_tab_t *dev)
if ( NULL != p )
{
memcpy(p, dev, sizeof(dbdev_tab_t));
p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id);
p->dev_id = DSCR_DEV2CUSTOM_ID(new_id, dev->dev_id);
ret = p->dev_id;
new_id++;
#if 0
@@ -671,7 +671,7 @@ _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
* parts. If it is fixedin the future, these dma_cache_inv will just
* be nothing more than empty macros. See io.h.
* */
dma_cache_inv((unsigned long)buf,nbytes);
dma_cache_inv((unsigned long)buf, nbytes);
dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
au_sync();
dma_cache_wback_inv((unsigned long)dp, sizeof(dp));

2
arch/mips/au1000/common/dbg_io.c
View File

@@ -53,7 +53,7 @@ typedef unsigned int uint32;
/* memory-mapped read/write of the port */
#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff)
#define UART16550_WRITE(y,z) (au_writel(z&0xff, DEBUG_BASE + y))
#define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y))
extern unsigned long get_au1x00_uart_baud_base(void);
extern unsigned long cal_r4koff(void);

2
arch/mips/au1000/common/power.c
View File

@@ -211,7 +211,7 @@ int au_sleep(void)
unsigned long wakeup, flags;
extern void save_and_sleep(void);
spin_lock_irqsave(&pm_lock,flags);
spin_lock_irqsave(&pm_lock, flags);
save_core_regs();

2
arch/mips/au1000/pb1200/irqmap.c
View File

@@ -132,7 +132,7 @@ static void pb1200_shutdown_irq( unsigned int irq_nr )
pb1200_disable_irq(irq_nr);
if (--pb1200_cascade_en == 0)
{
free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
free_irq(AU1000_GPIO_7, &pb1200_cascade_handler );
}
return;
}

10
arch/mips/boot/addinitrd.c
View File

@@ -40,7 +40,7 @@ void die(char *s)
int main(int argc, char *argv[])
{
int fd_vmlinux,fd_initrd,fd_outfile;
int fd_vmlinux, fd_initrd, fd_outfile;
FILHDR efile;
AOUTHDR eaout;
SCNHDR esecs[3];
@@ -48,15 +48,15 @@ int main(int argc, char *argv[])
char buf[1024];
unsigned long loadaddr;
unsigned long initrd_header[2];
int i,cnt;
int i, cnt;
int swab = 0;
if (argc != 4) {
printf("Usage: %s <vmlinux> <initrd> <outfile>\n",argv[0]);
printf("Usage: %s <vmlinux> <initrd> <outfile>\n", argv[0]);
exit(1);
}
if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0)
if ((fd_vmlinux = open (argv[1], O_RDONLY)) < 0)
die("open vmlinux");
if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile)
die("read file header");
@@ -98,7 +98,7 @@ int main(int argc, char *argv[])
eaout.dsize = esecs[1].s_size = initrd_header[1] = SWAB(st.st_size+8);
eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr);
if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC,0666)) < 0)
if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC, 0666)) < 0)
die("open outfile");
if (write (fd_outfile, &efile, sizeof efile) != sizeof efile)
die("write file header");

2
arch/mips/boot/elf2ecoff.c
View File

@@ -467,7 +467,7 @@ int main(int argc, char *argv[])
esecs[0].s_scnptr = N_TXTOFF(efh, eah);
esecs[1].s_scnptr = N_DATOFF(efh, eah);
#define ECOFF_SEGMENT_ALIGNMENT(a) 0x10
#define ECOFF_ROUND(s,a) (((s)+(a)-1)&~((a)-1))
#define ECOFF_ROUND(s, a) (((s)+(a)-1)&~((a)-1))
esecs[2].s_scnptr = esecs[1].s_scnptr +
ECOFF_ROUND(esecs[1].s_size, ECOFF_SEGMENT_ALIGNMENT(&eah));
if (addflag) {

2
arch/mips/kernel/binfmt_elfo32.c
View File

@@ -110,7 +110,7 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
}
#undef ELF_CORE_COPY_REGS
#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs);
#define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs);
void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs)
{

8
arch/mips/kernel/gdb-stub.c
View File

@@ -902,7 +902,7 @@ void handle_exception(struct gdb_regs *regs)
hex2mem(ptr, (char *)&regs->frame_ptr, 2*sizeof(long), 0, 0);
ptr += 2*(2*sizeof(long));
hex2mem(ptr, (char *)&regs->cp0_index, 16*sizeof(long), 0, 0);
strcpy(output_buffer,"OK");
strcpy(output_buffer, "OK");
}
break;
@@ -919,7 +919,7 @@ void handle_exception(struct gdb_regs *regs)
break;
strcpy(output_buffer, "E03");
} else
strcpy(output_buffer,"E01");
strcpy(output_buffer, "E01");
break;
/*
@@ -996,7 +996,7 @@ void handle_exception(struct gdb_regs *regs)
ptr = &input_buffer[1];
if (!hexToInt(&ptr, &baudrate))
{
strcpy(output_buffer,"B01");
strcpy(output_buffer, "B01");
break;
}
@@ -1015,7 +1015,7 @@ void handle_exception(struct gdb_regs *regs)
break;
default:
baudrate = 0;
strcpy(output_buffer,"B02");
strcpy(output_buffer, "B02");
goto x1;
}

14
arch/mips/kernel/i8259.c
View File

@@ -127,14 +127,14 @@ static inline int i8259A_irq_real(unsigned int irq)
int irqmask = 1 << irq;
if (irq < 8) {
outb(0x0B,PIC_MASTER_CMD); /* ISR register */
outb(0x0B, PIC_MASTER_CMD); /* ISR register */
value = inb(PIC_MASTER_CMD) & irqmask;
outb(0x0A,PIC_MASTER_CMD); /* back to the IRR register */
outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */
return value;
}
outb(0x0B,PIC_SLAVE_CMD); /* ISR register */
outb(0x0B, PIC_SLAVE_CMD); /* ISR register */
value = inb(PIC_SLAVE_CMD) & (irqmask >> 8);
outb(0x0A,PIC_SLAVE_CMD); /* back to the IRR register */
outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */
return value;
}
@@ -175,12 +175,12 @@ handle_real_irq:
if (irq & 8) {
inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */
outb(cached_slave_mask, PIC_SLAVE_IMR);
outb(0x60+(irq&7),PIC_SLAVE_CMD);/* 'Specific EOI' to slave */
outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */
outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
} else {
inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
outb(cached_master_mask, PIC_MASTER_IMR);
outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */
outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
}
smtc_im_ack_irq(irq);
spin_unlock_irqrestore(&i8259A_lock, flags);

8
arch/mips/kernel/irixelf.c
View File

@@ -231,16 +231,16 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc,
sp -= argc+1;
argv = sp;
__put_user((elf_addr_t)argc,--sp);
__put_user((elf_addr_t)argc, --sp);
current->mm->arg_start = (unsigned long) p;
while (argc-->0) {
__put_user((unsigned long)p,argv++);
__put_user((unsigned long)p, argv++);
p += strlen_user(p);
}
__put_user((unsigned long) NULL, argv);
current->mm->arg_end = current->mm->env_start = (unsigned long) p;
while (envc-->0) {
__put_user((unsigned long)p,envp++);
__put_user((unsigned long)p, envp++);
p += strlen_user(p);
}
__put_user((unsigned long) NULL, envp);
@@ -831,7 +831,7 @@ static int load_irix_library(struct file *file)
int retval;
unsigned int bss;
int error;
int i,j, k;
int i, j, k;
error = kernel_read(file, 0, (char *) &elf_ex, sizeof(elf_ex));
if (error != sizeof(elf_ex))

8
arch/mips/kernel/irixsig.c
View File

@@ -163,9 +163,9 @@ static inline int handle_signal(unsigned long sig, siginfo_t *info,
ret = setup_irix_frame(ka, regs, sig, oldset);
spin_lock_irq(&current->sighand->siglock);
sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
if (!(ka->sa.sa_flags & SA_NODEFER))
sigaddset(&current->blocked,sig);
sigaddset(&current->blocked, sig);
recalc_sigpending();
spin_unlock_irq(&current->sighand->siglock);
@@ -605,8 +605,8 @@ repeat:
current->state = TASK_INTERRUPTIBLE;
read_lock(&tasklist_lock);
tsk = current;
list_for_each(_p,&tsk->children) {
p = list_entry(_p,struct task_struct,sibling);
list_for_each(_p, &tsk->children) {
p = list_entry(_p, struct task_struct, sibling);
if ((type == IRIX_P_PID) && p->pid != pid)
continue;
if ((type == IRIX_P_PGID) && process_group(p) != pid)

4
arch/mips/kernel/irq.c
View File

@@ -93,7 +93,7 @@ int show_interrupts(struct seq_file *p, void *v)
if (i == 0) {
seq_printf(p, " ");
for_each_online_cpu(j)
seq_printf(p, "CPU%d ",j);
seq_printf(p, "CPU%d ", j);
seq_putc(p, '\n');
}
@@ -102,7 +102,7 @@ int show_interrupts(struct seq_file *p, void *v)
action = irq_desc[i].action;
if (!action)
goto skip;
seq_printf(p, "%3d: ",i);
seq_printf(p, "%3d: ", i);
#ifndef CONFIG_SMP
seq_printf(p, "%10u ", kstat_irqs(i));
#else

2
arch/mips/kernel/kspd.c
View File

@@ -239,7 +239,7 @@ void sp_work_handle_request(void)
case MTSP_SYSCALL_GETTOD:
memset(&tz, 0, sizeof(tz));
if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv,
(int)&tz, 0,0)) == 0)
(int)&tz, 0, 0)) == 0)
ret.retval = tv.tv_sec;
break;

10
arch/mips/kernel/linux32.c
View File

@@ -58,10 +58,10 @@
#define AA(__x) ((unsigned long)((int)__x))
#ifdef __MIPSEB__
#define merge_64(r1,r2) ((((r1) & 0xffffffffUL) << 32) + ((r2) & 0xffffffffUL))
#define merge_64(r1, r2) ((((r1) & 0xffffffffUL) << 32) + ((r2) & 0xffffffffUL))
#endif
#ifdef __MIPSEL__
#define merge_64(r1,r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL))
#define merge_64(r1, r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL))
#endif
/*
@@ -96,7 +96,7 @@ int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf)
#endif
tmp.st_blocks = stat->blocks;
tmp.st_blksize = stat->blksize;
return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0;
return copy_to_user(statbuf, &tmp, sizeof(tmp)) ? -EFAULT : 0;
}
asmlinkage unsigned long
@@ -510,11 +510,11 @@ asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32)
if (err)
goto out;
memset(&tmp32,0,sizeof(struct ustat32));
memset(&tmp32, 0, sizeof(struct ustat32));
tmp32.f_tfree = tmp.f_tfree;
tmp32.f_tinode = tmp.f_tinode;
err = copy_to_user(ubuf32,&tmp32,sizeof(struct ustat32)) ? -EFAULT : 0;
err = copy_to_user(ubuf32, &tmp32, sizeof(struct ustat32)) ? -EFAULT : 0;
out:
return err;

4
arch/mips/kernel/signal.c
View File

@@ -613,9 +613,9 @@ static int handle_signal(unsigned long sig, siginfo_t *info,
ret = current->thread.abi->setup_frame(ka, regs, sig, oldset);
spin_lock_irq(&current->sighand->siglock);
sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
if (!(ka->sa.sa_flags & SA_NODEFER))
sigaddset(&current->blocked,sig);
sigaddset(&current->blocked, sig);
recalc_sigpending();
spin_unlock_irq(&current->sighand->siglock);

6
arch/mips/kernel/smtc.c
View File

@@ -180,7 +180,7 @@ void __init sanitize_tlb_entries(void)
static void smtc_configure_tlb(void)
{
int i,tlbsiz,vpes;
int i, tlbsiz, vpes;
unsigned long mvpconf0;
unsigned long config1val;
@@ -423,7 +423,7 @@ void mipsmt_prepare_cpus(void)
* code. Leave it alone!
*/
if (tc != 0) {
smtc_tc_setup(vpe,tc, cpu);
smtc_tc_setup(vpe, tc, cpu);
cpu++;
}
printk(" %d", tc);
@@ -431,7 +431,7 @@ void mipsmt_prepare_cpus(void)
}
if (slop) {
if (tc != 0) {
smtc_tc_setup(vpe,tc, cpu);
smtc_tc_setup(vpe, tc, cpu);
cpu++;
}
printk(" %d", tc);

2
arch/mips/kernel/syscall.c
View File

@@ -245,7 +245,7 @@ asmlinkage int sys_olduname(struct oldold_utsname __user * name)
if (!name)
return -EFAULT;
if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname)))
if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
return -EFAULT;
error = __copy_to_user(&name->sysname, &utsname()->sysname,

2
arch/mips/kernel/sysirix.c
View File

@@ -778,7 +778,7 @@ asmlinkage int irix_times(struct tms __user *tbuf)
int err = 0;
if (tbuf) {
if (!access_ok(VERIFY_WRITE,tbuf,sizeof *tbuf))
if (!access_ok(VERIFY_WRITE, tbuf, sizeof *tbuf))
return -EFAULT;
err = __put_user(current->utime, &tbuf->tms_utime);

2
arch/mips/kernel/vpe.c
View File

@@ -1044,7 +1044,7 @@ static int getcwd(char *buff, int size)
old_fs = get_fs();
set_fs(KERNEL_DS);
ret = sys_getcwd(buff,size);
ret = sys_getcwd(buff, size);
set_fs(old_fs);

24
arch/mips/math-emu/cp1emu.c
View File

@@ -178,24 +178,24 @@ static int isBranchInstr(mips_instruction * i)
#define FR_BIT 0
#endif
#define SIFROMREG(si,x) ((si) = \
#define SIFROMREG(si, x) ((si) = \
(xcp->cp0_status & FR_BIT) || !(x & 1) ? \
(int)ctx->fpr[x] : \
(int)(ctx->fpr[x & ~1] >> 32 ))
#define SITOREG(si,x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] = \
#define SITOREG(si, x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] = \
(xcp->cp0_status & FR_BIT) || !(x & 1) ? \
ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \
ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32)
#define DIFROMREG(di,x) ((di) = \
#define DIFROMREG(di, x) ((di) = \
ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)])
#define DITOREG(di,x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] \
#define DITOREG(di, x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] \
= (di))
#define SPFROMREG(sp,x) SIFROMREG((sp).bits,x)
#define SPTOREG(sp,x) SITOREG((sp).bits,x)
#define DPFROMREG(dp,x) DIFROMREG((dp).bits,x)
#define DPTOREG(dp,x) DITOREG((dp).bits,x)
#define SPFROMREG(sp, x) SIFROMREG((sp).bits, x)
#define SPTOREG(sp, x) SITOREG((sp).bits, x)
#define DPFROMREG(dp, x) DIFROMREG((dp).bits, x)
#define DPTOREG(dp, x) DITOREG((dp).bits, x)
/*
* Emulate the single floating point instruction pointed at by EPC.
@@ -584,12 +584,12 @@ static ieee754sp fpemu_sp_rsqrt(ieee754sp s)
return ieee754sp_div(ieee754sp_one(0), ieee754sp_sqrt(s));
}
DEF3OP(madd, sp, ieee754sp_mul, ieee754sp_add,);
DEF3OP(msub, sp, ieee754sp_mul, ieee754sp_sub,);
DEF3OP(madd, sp, ieee754sp_mul, ieee754sp_add, );
DEF3OP(msub, sp, ieee754sp_mul, ieee754sp_sub, );
DEF3OP(nmadd, sp, ieee754sp_mul, ieee754sp_add, ieee754sp_neg);
DEF3OP(nmsub, sp, ieee754sp_mul, ieee754sp_sub, ieee754sp_neg);
DEF3OP(madd, dp, ieee754dp_mul, ieee754dp_add,);
DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub,);
DEF3OP(madd, dp, ieee754dp_mul, ieee754dp_add, );
DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub, );
DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);

2
arch/mips/math-emu/dp_mul.c
View File

@@ -121,7 +121,7 @@ ieee754dp ieee754dp_mul(ieee754dp x, ieee754dp y)
*/
/* 32 * 32 => 64 */
#define DPXMULT(x,y) ((u64)(x) * (u64)y)
#define DPXMULT(x, y) ((u64)(x) * (u64)y)
{
unsigned lxm = xm;

12
arch/mips/math-emu/ieee754.c
View File

@@ -47,13 +47,13 @@
#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__)
#define SPSTR(s,b,m) {m,b,s}
#define DPSTR(s,b,mh,ml) {ml,mh,b,s}
#define SPSTR(s, b, m) {m, b, s}
#define DPSTR(s, b, mh, ml) {ml, mh, b, s}
#endif
#ifdef __MIPSEB__
#define SPSTR(s,b,m) {s,b,m}
#define DPSTR(s,b,mh,ml) {s,b,mh,ml}
#define SPSTR(s, b, m) {s, b, m}
#define DPSTR(s, b, mh, ml) {s, b, mh, ml}
#endif
const struct ieee754dp_konst __ieee754dp_spcvals[] = {
@@ -65,7 +65,7 @@ const struct ieee754dp_konst __ieee754dp_spcvals[] = {
DPSTR(1, 3 + DP_EBIAS, 0x40000, 0), /* - 10.0 */
DPSTR(0, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* + infinity */
DPSTR(1, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* - infinity */
DPSTR(0,DP_EMAX+1+DP_EBIAS,0x7FFFF,0xFFFFFFFF), /* + indef quiet Nan */
DPSTR(0, DP_EMAX+1+DP_EBIAS, 0x7FFFF, 0xFFFFFFFF), /* + indef quiet Nan */
DPSTR(0, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* + max */
DPSTR(1, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* - max */
DPSTR(0, DP_EMIN + DP_EBIAS, 0, 0), /* + min normal */
@@ -85,7 +85,7 @@ const struct ieee754sp_konst __ieee754sp_spcvals[] = {
SPSTR(1, 3 + SP_EBIAS, 0x200000), /* - 10.0 */
SPSTR(0, SP_EMAX + 1 + SP_EBIAS, 0), /* + infinity */
SPSTR(1, SP_EMAX + 1 + SP_EBIAS, 0), /* - infinity */
SPSTR(0,SP_EMAX+1+SP_EBIAS,0x3FFFFF), /* + indef quiet Nan */
SPSTR(0, SP_EMAX+1+SP_EBIAS, 0x3FFFFF), /* + indef quiet Nan */
SPSTR(0, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* + max normal */
SPSTR(1, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* - max normal */
SPSTR(0, SP_EMIN + SP_EBIAS, 0), /* + min normal */

12
arch/mips/math-emu/ieee754dp.h
View File

@@ -43,8 +43,8 @@
/* convert denormal to normalized with extended exponent */
#define DPDNORMx(m,e) \
while( (m >> DP_MBITS) == 0) { m <<= 1; e--; }
#define DPDNORMX DPDNORMx(xm,xe)
#define DPDNORMY DPDNORMx(ym,ye)
#define DPDNORMX DPDNORMx(xm, xe)
#define DPDNORMY DPDNORMx(ym, ye)
static __inline ieee754dp builddp(int s, int bx, u64 m)
{
@@ -71,13 +71,13 @@ extern ieee754dp ieee754dp_bestnan(ieee754dp, ieee754dp);
extern ieee754dp ieee754dp_format(int, int, u64);
#define DPNORMRET2(s,e,m,name,a0,a1) \
#define DPNORMRET2(s, e, m, name, a0, a1) \
{ \
ieee754dp V = ieee754dp_format(s,e,m); \
ieee754dp V = ieee754dp_format(s, e, m); \
if(TSTX()) \
return ieee754dp_xcpt(V,name,a0,a1); \
return ieee754dp_xcpt(V, name, a0, a1); \
else \
return V; \
}
#define DPNORMRET1(s,e,m,name,a0) DPNORMRET2(s,e,m,name,a0,a0)
#define DPNORMRET1(s, e, m, name, a0) DPNORMRET2(s, e, m, name, a0, a0)

30
arch/mips/math-emu/ieee754int.h
View File

@@ -55,16 +55,16 @@
#define DPBEXP(dp) (dp.parts.bexp)
#define DPMANT(dp) (dp.parts.mant)
#define CLPAIR(x,y) ((x)*6+(y))
#define CLPAIR(x, y) ((x)*6+(y))
#define CLEARCX \
(ieee754_csr.cx = 0)
#define SETCX(x) \
(ieee754_csr.cx |= (x),ieee754_csr.sx |= (x))
(ieee754_csr.cx |= (x), ieee754_csr.sx |= (x))
#define SETANDTESTCX(x) \
(SETCX(x),ieee754_csr.mx & (x))
(SETCX(x), ieee754_csr.mx & (x))
#define TSTX() \
(ieee754_csr.cx & ieee754_csr.mx)
@@ -76,7 +76,7 @@
#define COMPYSP \
unsigned ym; int ye; int ys; int yc
#define EXPLODESP(v,vc,vs,ve,vm) \
#define EXPLODESP(v, vc, vs, ve, vm) \
{\
vs = SPSIGN(v);\
ve = SPBEXP(v);\
@@ -100,8 +100,8 @@
vc = IEEE754_CLASS_NORM;\
}\
}
#define EXPLODEXSP EXPLODESP(x,xc,xs,xe,xm)
#define EXPLODEYSP EXPLODESP(y,yc,ys,ye,ym)
#define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm)
#define EXPLODEYSP EXPLODESP(y, yc, ys, ye, ym)
#define COMPXDP \
@@ -110,7 +110,7 @@ u64 xm; int xe; int xs; int xc
#define COMPYDP \
u64 ym; int ye; int ys; int yc
#define EXPLODEDP(v,vc,vs,ve,vm) \
#define EXPLODEDP(v, vc, vs, ve, vm) \
{\
vm = DPMANT(v);\
vs = DPSIGN(v);\
@@ -134,10 +134,10 @@ u64 ym; int ye; int ys; int yc
vc = IEEE754_CLASS_NORM;\
}\
}
#define EXPLODEXDP EXPLODEDP(x,xc,xs,xe,xm)
#define EXPLODEYDP EXPLODEDP(y,yc,ys,ye,ym)
#define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm)
#define EXPLODEYDP EXPLODEDP(y, yc, ys, ye, ym)
#define FLUSHDP(v,vc,vs,ve,vm) \
#define FLUSHDP(v, vc, vs, ve, vm) \
if(vc==IEEE754_CLASS_DNORM) {\
if(ieee754_csr.nod) {\
SETCX(IEEE754_INEXACT);\
@@ -148,7 +148,7 @@ u64 ym; int ye; int ys; int yc
}\
}
#define FLUSHSP(v,vc,vs,ve,vm) \
#define FLUSHSP(v, vc, vs, ve, vm) \
if(vc==IEEE754_CLASS_DNORM) {\
if(ieee754_csr.nod) {\
SETCX(IEEE754_INEXACT);\
@@ -159,7 +159,7 @@ u64 ym; int ye; int ys; int yc
}\
}
#define FLUSHXDP FLUSHDP(x,xc,xs,xe,xm)
#define FLUSHYDP FLUSHDP(y,yc,ys,ye,ym)
#define FLUSHXSP FLUSHSP(x,xc,xs,xe,xm)
#define FLUSHYSP FLUSHSP(y,yc,ys,ye,ym)
#define FLUSHXDP FLUSHDP(x, xc, xs, xe, xm)
#define FLUSHYDP FLUSHDP(y, yc, ys, ye, ym)
#define FLUSHXSP FLUSHSP(x, xc, xs, xe, xm)
#define FLUSHYSP FLUSHSP(y, yc, ys, ye, ym)

12
arch/mips/math-emu/ieee754sp.h
View File

@@ -48,8 +48,8 @@
/* convert denormal to normalized with extended exponent */
#define SPDNORMx(m,e) \
while( (m >> SP_MBITS) == 0) { m <<= 1; e--; }
#define SPDNORMX SPDNORMx(xm,xe)
#define SPDNORMY SPDNORMx(ym,ye)
#define SPDNORMX SPDNORMx(xm, xe)
#define SPDNORMY SPDNORMx(ym, ye)
static __inline ieee754sp buildsp(int s, int bx, unsigned m)
{
@@ -77,13 +77,13 @@ extern ieee754sp ieee754sp_bestnan(ieee754sp, ieee754sp);
extern ieee754sp ieee754sp_format(int, int, unsigned);
#define SPNORMRET2(s,e,m,name,a0,a1) \
#define SPNORMRET2(s, e, m, name, a0, a1) \
{ \
ieee754sp V = ieee754sp_format(s,e,m); \
ieee754sp V = ieee754sp_format(s, e, m); \
if(TSTX()) \
return ieee754sp_xcpt(V,name,a0,a1); \
return ieee754sp_xcpt(V, name, a0, a1); \
else \
return V; \
}
#define SPNORMRET1(s,e,m,name,a0) SPNORMRET2(s,e,m,name,a0,a0)
#define SPNORMRET1(s, e, m, name, a0) SPNORMRET2(s, e, m, name, a0, a0)

2
arch/mips/mips-boards/atlas/atlas_gdb.c
View File

@@ -22,7 +22,7 @@
#include <asm/mips-boards/saa9730_uart.h>
#define INB(a) inb((unsigned long)a)
#define OUTB(x,a) outb(x,(unsigned long)a)
#define OUTB(x, a) outb(x, (unsigned long)a)
/*
* This is the interface to the remote debugger stub

2
arch/mips/mips-boards/malta/malta_int.c
View File

@@ -124,7 +124,7 @@ static void corehi_irqdispatch(void)
{
unsigned int intedge, intsteer, pcicmd, pcibadaddr;
unsigned int pcimstat, intisr, inten, intpol;
unsigned int intrcause,datalo,datahi;
unsigned int intrcause, datalo, datahi;
struct pt_regs *regs = get_irq_regs();
printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n");

2
arch/mips/mips-boards/malta/malta_setup.c
View File

@@ -176,7 +176,7 @@ void __init plat_mem_setup(void)
0, /* orig-video-page */
0, /* orig-video-mode */
80, /* orig-video-cols */
0,0,0, /* ega_ax, ega_bx, ega_cx */
0, 0, 0, /* ega_ax, ega_bx, ega_cx */
25, /* orig-video-lines */
VIDEO_TYPE_VGAC, /* orig-video-isVGA */
16 /* orig-video-points */

8
arch/mips/mm/c-r4k.c
View File

@@ -164,12 +164,12 @@ static inline void tx49_blast_icache32(void)
/* I'm in even chunk. blast odd chunks */
for (ws = 0; ws < ws_end; ws += ws_inc)
for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
cache32_unroll32(addr|ws,Index_Invalidate_I);
cache32_unroll32(addr|ws, Index_Invalidate_I);
CACHE32_UNROLL32_ALIGN;
/* I'm in odd chunk. blast even chunks */
for (ws = 0; ws < ws_end; ws += ws_inc)
for (addr = start; addr < end; addr += 0x400 * 2)
cache32_unroll32(addr|ws,Index_Invalidate_I);
cache32_unroll32(addr|ws, Index_Invalidate_I);
}
static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page)
@@ -195,12 +195,12 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page)
/* I'm in even chunk. blast odd chunks */
for (ws = 0; ws < ws_end; ws += ws_inc)
for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
cache32_unroll32(addr|ws,Index_Invalidate_I);
cache32_unroll32(addr|ws, Index_Invalidate_I);
CACHE32_UNROLL32_ALIGN;
/* I'm in odd chunk. blast even chunks */
for (ws = 0; ws < ws_end; ws += ws_inc)
for (addr = start; addr < end; addr += 0x400 * 2)
cache32_unroll32(addr|ws,Index_Invalidate_I);
cache32_unroll32(addr|ws, Index_Invalidate_I);
}
static void (* r4k_blast_icache_page)(unsigned long addr);

24
arch/mips/mm/cerr-sb1.c
View File

@@ -271,14 +271,22 @@ asmlinkage void sb1_cache_error(void)
/* Parity lookup table. */
static const uint8_t parity[256] = {
0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,
1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,
0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,
0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0
};
/* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */

4
arch/mips/mm/pg-sb1.c
View File

@@ -188,9 +188,9 @@ static inline void copy_page_cpu(void *to, void *from)
: "+r" (src), "+r" (dst)
: "r" (end)
#ifdef CONFIG_64BIT
: "$8","$9","$10","$11","memory");
: "$8", "$9", "$10", "$11", "memory");
#else
: "$2","$3","$6","$7","$8","$9","$10","$11","memory");
: "$2", "$3", "$6", "$7", "$8", "$9", "$10", "$11", "memory");
#endif
}

8
arch/mips/mm/pgtable.c
View File

@@ -29,9 +29,9 @@ void show_mem(void)
shared += page_count(page) - 1;
}
printk("%d pages of RAM\n", total);
printk("%d pages of HIGHMEM\n",highmem);
printk("%d reserved pages\n",reserved);
printk("%d pages shared\n",shared);
printk("%d pages swap cached\n",cached);
printk("%d pages of HIGHMEM\n", highmem);
printk("%d reserved pages\n", reserved);
printk("%d pages shared\n", shared);
printk("%d pages swap cached\n", cached);
#endif
}

2
arch/mips/mm/tlb-r8k.c
View File

@@ -56,7 +56,7 @@ void local_flush_tlb_mm(struct mm_struct *mm)
int cpu = smp_processor_id();
if (cpu_context(cpu, mm) != 0)
drop_mmu_context(mm,cpu);
drop_mmu_context(mm, cpu);
}
void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,

94
arch/mips/mm/tlbex.c
View File

@@ -141,53 +141,53 @@ struct insn {
| (f) << FUNC_SH)
static __initdata struct insn insn_table[] = {
{ insn_addiu, M(addiu_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_addu, M(spec_op,0,0,0,0,addu_op), RS | RT | RD },
{ insn_and, M(spec_op,0,0,0,0,and_op), RS | RT | RD },
{ insn_andi, M(andi_op,0,0,0,0,0), RS | RT | UIMM },
{ insn_beq, M(beq_op,0,0,0,0,0), RS | RT | BIMM },
{ insn_beql, M(beql_op,0,0,0,0,0), RS | RT | BIMM },
{ insn_bgez, M(bcond_op,0,bgez_op,0,0,0), RS | BIMM },
{ insn_bgezl, M(bcond_op,0,bgezl_op,0,0,0), RS | BIMM },
{ insn_bltz, M(bcond_op,0,bltz_op,0,0,0), RS | BIMM },
{ insn_bltzl, M(bcond_op,0,bltzl_op,0,0,0), RS | BIMM },
{ insn_bne, M(bne_op,0,0,0,0,0), RS | RT | BIMM },
{ insn_daddiu, M(daddiu_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_daddu, M(spec_op,0,0,0,0,daddu_op), RS | RT | RD },
{ insn_dmfc0, M(cop0_op,dmfc_op,0,0,0,0), RT | RD | SET},
{ insn_dmtc0, M(cop0_op,dmtc_op,0,0,0,0), RT | RD | SET},
{ insn_dsll, M(spec_op,0,0,0,0,dsll_op), RT | RD | RE },
{ insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE },
{ insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE },
{ insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE },
{ insn_dsrl32, M(spec_op,0,0,0,0,dsrl32_op), RT | RD | RE },
{ insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD },
{ insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 },
{ insn_j, M(j_op,0,0,0,0,0), JIMM },
{ insn_jal, M(jal_op,0,0,0,0,0), JIMM },
{ insn_jr, M(spec_op,0,0,0,0,jr_op), RS },
{ insn_ld, M(ld_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_ll, M(ll_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_lld, M(lld_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_lui, M(lui_op,0,0,0,0,0), RT | SIMM },
{ insn_lw, M(lw_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_mfc0, M(cop0_op,mfc_op,0,0,0,0), RT | RD | SET},
{ insn_mtc0, M(cop0_op,mtc_op,0,0,0,0), RT | RD | SET},
{ insn_ori, M(ori_op,0,0,0,0,0), RS | RT | UIMM },
{ insn_rfe, M(cop0_op,cop_op,0,0,0,rfe_op), 0 },
{ insn_sc, M(sc_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_scd, M(scd_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_sd, M(sd_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_sll, M(spec_op,0,0,0,0,sll_op), RT | RD | RE },
{ insn_sra, M(spec_op,0,0,0,0,sra_op), RT | RD | RE },
{ insn_srl, M(spec_op,0,0,0,0,srl_op), RT | RD | RE },
{ insn_subu, M(spec_op,0,0,0,0,subu_op), RS | RT | RD },
{ insn_sw, M(sw_op,0,0,0,0,0), RS | RT | SIMM },
{ insn_tlbp, M(cop0_op,cop_op,0,0,0,tlbp_op), 0 },
{ insn_tlbwi, M(cop0_op,cop_op,0,0,0,tlbwi_op), 0 },
{ insn_tlbwr, M(cop0_op,cop_op,0,0,0,tlbwr_op), 0 },
{ insn_xor, M(spec_op,0,0,0,0,xor_op), RS | RT | RD },
{ insn_xori, M(xori_op,0,0,0,0,0), RS | RT | UIMM },
{ insn_addiu, M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_addu, M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD },
{ insn_and, M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD },
{ insn_andi, M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
{ insn_beq, M(beq_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
{ insn_beql, M(beql_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
{ insn_bgez, M(bcond_op, 0, bgez_op, 0, 0, 0), RS | BIMM },
{ insn_bgezl, M(bcond_op, 0, bgezl_op, 0, 0, 0), RS | BIMM },
{ insn_bltz, M(bcond_op, 0, bltz_op, 0, 0, 0), RS | BIMM },
{ insn_bltzl, M(bcond_op, 0, bltzl_op, 0, 0, 0), RS | BIMM },
{ insn_bne, M(bne_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
{ insn_daddiu, M(daddiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_daddu, M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD },
{ insn_dmfc0, M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET},
{ insn_dmtc0, M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET},
{ insn_dsll, M(spec_op, 0, 0, 0, 0, dsll_op), RT | RD | RE },
{ insn_dsll32, M(spec_op, 0, 0, 0, 0, dsll32_op), RT | RD | RE },
{ insn_dsra, M(spec_op, 0, 0, 0, 0, dsra_op), RT | RD | RE },
{ insn_dsrl, M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE },
{ insn_dsrl32, M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE },
{ insn_dsubu, M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD },
{ insn_eret, M(cop0_op, cop_op, 0, 0, 0, eret_op), 0 },
{ insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM },
{ insn_jal, M(jal_op, 0, 0, 0, 0, 0), JIMM },
{ insn_jr, M(spec_op, 0, 0, 0, 0, jr_op), RS },
{ insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM },
{ insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
{ insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
{ insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
{ insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 },
{ insn_sc, M(sc_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_scd, M(scd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE },
{ insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE },
{ insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE },
{ insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD },
{ insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_tlbp, M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0 },
{ insn_tlbwi, M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0 },
{ insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 },
{ insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD },
{ insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
{ insn_invalid, 0, 0 }
};

6
arch/mips/pci/pci-bcm1480.c
View File

@@ -49,8 +49,8 @@
* Macros for calculating offsets into config space given a device
* structure or dev/fun/reg
*/
#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where))
#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where)
#define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
static void *cfg_space;
@@ -255,7 +255,7 @@ static int __init bcm1480_pcibios_init(void)
register_pci_controller(&bcm1480_controller);
#ifdef CONFIG_VGA_CONSOLE
take_over_console(&vga_con,0,MAX_NR_CONSOLES-1,1);
take_over_console(&vga_con, 0, MAX_NR_CONSOLES-1, 1);
#endif
return 0;
}

4
arch/mips/pci/pci-bcm1480ht.c
View File

@@ -48,8 +48,8 @@
* Macros for calculating offsets into config space given a device
* structure or dev/fun/reg
*/
#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where))
#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where)
#define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
static void *ht_cfg_space;

4
arch/mips/pci/pci-sb1250.c
View File

@@ -49,8 +49,8 @@
* Macros for calculating offsets into config space given a device
* structure or dev/fun/reg
*/
#define CFGOFFSET(bus,devfn,where) (((bus)<<16) + ((devfn)<<8) + (where))
#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where)
#define CFGOFFSET(bus, devfn, where) (((bus)<<16) + ((devfn)<<8) + (where))
#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
static void *cfg_space;

32
arch/mips/philips/pnx8550/common/proc.c
View File

@@ -33,14 +33,14 @@ static int pnx8550_timers_read(char* page, char** start, off_t offset, int count
int configPR = read_c0_config7();
if (offset==0) {
len += sprintf(&page[len],"Timer: count, compare, tc, status\n");
len += sprintf(&page[len]," 1: %11i, %8i, %1i, %s\n",
len += sprintf(&page[len], "Timer: count, compare, tc, status\n");
len += sprintf(&page[len], " 1: %11i, %8i, %1i, %s\n",
read_c0_count(), read_c0_compare(),
(configPR>>6)&0x1, ((configPR>>3)&0x1)? "off":"on");
len += sprintf(&page[len]," 2: %11i, %8i, %1i, %s\n",
len += sprintf(&page[len], " 2: %11i, %8i, %1i, %s\n",
read_c0_count2(), read_c0_compare2(),
(configPR>>7)&0x1, ((configPR>>4)&0x1)? "off":"on");
len += sprintf(&page[len]," 3: %11i, %8i, %1i, %s\n",
len += sprintf(&page[len], " 3: %11i, %8i, %1i, %s\n",
read_c0_count3(), read_c0_compare3(),
(configPR>>8)&0x1, ((configPR>>5)&0x1)? "off":"on");
}
@@ -53,18 +53,18 @@ static int pnx8550_registers_read(char* page, char** start, off_t offset, int co
int len = 0;
if (offset==0) {
len += sprintf(&page[len],"config1: %#10.8x\n",read_c0_config1());
len += sprintf(&page[len],"config2: %#10.8x\n",read_c0_config2());
len += sprintf(&page[len],"config3: %#10.8x\n",read_c0_config3());
len += sprintf(&page[len],"configPR: %#10.8x\n",read_c0_config7());
len += sprintf(&page[len],"status: %#10.8x\n",read_c0_status());
len += sprintf(&page[len],"cause: %#10.8x\n",read_c0_cause());
len += sprintf(&page[len],"count: %#10.8x\n",read_c0_count());
len += sprintf(&page[len],"count_2: %#10.8x\n",read_c0_count2());
len += sprintf(&page[len],"count_3: %#10.8x\n",read_c0_count3());
len += sprintf(&page[len],"compare: %#10.8x\n",read_c0_compare());
len += sprintf(&page[len],"compare_2: %#10.8x\n",read_c0_compare2());
len += sprintf(&page[len],"compare_3: %#10.8x\n",read_c0_compare3());
len += sprintf(&page[len], "config1: %#10.8x\n", read_c0_config1());
len += sprintf(&page[len], "config2: %#10.8x\n", read_c0_config2());
len += sprintf(&page[len], "config3: %#10.8x\n", read_c0_config3());
len += sprintf(&page[len], "configPR: %#10.8x\n", read_c0_config7());
len += sprintf(&page[len], "status: %#10.8x\n", read_c0_status());
len += sprintf(&page[len], "cause: %#10.8x\n", read_c0_cause());
len += sprintf(&page[len], "count: %#10.8x\n", read_c0_count());
len += sprintf(&page[len], "count_2: %#10.8x\n", read_c0_count2());
len += sprintf(&page[len], "count_3: %#10.8x\n", read_c0_count3());
len += sprintf(&page[len], "compare: %#10.8x\n", read_c0_compare());
len += sprintf(&page[len], "compare_2: %#10.8x\n", read_c0_compare2());
len += sprintf(&page[len], "compare_3: %#10.8x\n", read_c0_compare3());
}
return len;

8
arch/mips/pmc-sierra/msp71xx/msp_serial.c
View File

@@ -117,7 +117,7 @@ void __init msp_serial_setup(void)
/* Initialize first serial port */
up.mapbase = MSP_UART0_BASE;
up.membase = ioremap_nocache(up.mapbase,MSP_UART_REG_LEN);
up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
up.irq = MSP_INT_UART0;
up.uartclk = uartclk;
up.regshift = 2;
@@ -145,9 +145,9 @@ void __init msp_serial_setup(void)
if( DEBUG_PORT_BASE == KSEG1ADDR(MSP_UART1_BASE) ) {
if( mips_machtype == MACH_MSP4200_FPGA
|| mips_machtype == MACH_MSP7120_FPGA )
initDebugPort(uartclk,19200);
initDebugPort(uartclk, 19200);
else
initDebugPort(uartclk,57600);
initDebugPort(uartclk, 57600);
}
#endif
break;
@@ -157,7 +157,7 @@ void __init msp_serial_setup(void)
}
up.mapbase = MSP_UART1_BASE;
up.membase = ioremap_nocache(up.mapbase,MSP_UART_REG_LEN);
up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
up.irq = MSP_INT_UART1;
up.line = 1;
up.private_data = (void*)UART1_STATUS_REG;

2
arch/mips/pmc-sierra/yosemite/ht.c
View File

@@ -115,7 +115,7 @@ static int titan_ht_config_read_word(struct pci_dev *device,
u32 longswap(unsigned long l)
{
unsigned char b1,b2,b3,b4;
unsigned char b1, b2, b3, b4;
b1 = l&255;
b2 = (l>>8)&255;

2
arch/mips/sgi-ip27/ip27-smp.c
View File

@@ -176,7 +176,7 @@ void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle)
unsigned long gp = (unsigned long)task_thread_info(idle);
unsigned long sp = __KSTK_TOS(idle);
LAUNCH_SLAVE(cputonasid(cpu),cputoslice(cpu),
LAUNCH_SLAVE(cputonasid(cpu), cputoslice(cpu),
(launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap),
0, (void *) sp, (void *) gp);
}

8
arch/mips/sibyte/bcm1480/irq.c
View File

@@ -289,7 +289,7 @@ int bcm1480_steal_irq(int irq)
if (irq >= BCM1480_NR_IRQS)
return -EINVAL;
spin_lock_irqsave(&desc->lock,flags);
spin_lock_irqsave(&desc->lock, flags);
/* Don't allow sharing at all for these */
if (desc->action != NULL)
retval = -EBUSY;
@@ -297,7 +297,7 @@ int bcm1480_steal_irq(int irq)
desc->action = &bcm1480_dummy_action;
desc->depth = 0;
}
spin_unlock_irqrestore(&desc->lock,flags);
spin_unlock_irqrestore(&desc->lock, flags);
return 0;
}
@@ -431,8 +431,8 @@ void __init arch_init_irq(void)
#include <linux/delay.h>
#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
static void bcm1480_kgdb_interrupt(void)
{

2
arch/mips/sibyte/cfe/console.c
View File

@@ -14,7 +14,7 @@ static void cfe_console_write(struct console *cons, const char *str,
{
int i, last, written;
for (i=0,last=0; i<count; i++) {
for (i=0, last=0; i<count; i++) {
if (!str[i])
/* XXXKW can/should this ever happen? */
return;

2
arch/mips/sibyte/cfe/setup.c
View File

@@ -309,7 +309,7 @@ void __init prom_init(void)
}
#ifdef CONFIG_KGDB
if ((arg = strstr(arcs_cmdline,"kgdb=duart")) != NULL)
if ((arg = strstr(arcs_cmdline, "kgdb=duart")) != NULL)
kgdb_port = (arg[10] == '0') ? 0 : 1;
else
kgdb_port = 1;

8
arch/mips/sibyte/sb1250/irq.c
View File

@@ -259,7 +259,7 @@ int sb1250_steal_irq(int irq)
if (irq >= SB1250_NR_IRQS)
return -EINVAL;
spin_lock_irqsave(&desc->lock,flags);
spin_lock_irqsave(&desc->lock, flags);
/* Don't allow sharing at all for these */
if (desc->action != NULL)
retval = -EBUSY;
@@ -267,7 +267,7 @@ int sb1250_steal_irq(int irq)
desc->action = &sb1250_dummy_action;
desc->depth = 0;
}
spin_unlock_irqrestore(&desc->lock,flags);
spin_unlock_irqrestore(&desc->lock, flags);
return 0;
}
@@ -381,8 +381,8 @@ void __init arch_init_irq(void)
#include <linux/delay.h>
#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
static void sb1250_kgdb_interrupt(void)
{

2
arch/mips/sibyte/sb1250/prom.c
View File

@@ -66,7 +66,7 @@ static void prom_linux_exit(void)
{
#ifdef CONFIG_SMP
if (smp_processor_id()) {
smp_call_function(prom_cpu0_exit,NULL,1,1);
smp_call_function(prom_cpu0_exit, NULL, 1, 1);
}
#endif
while(1);

4
arch/mips/sibyte/swarm/dbg_io.c
View File

@@ -37,8 +37,8 @@ static int duart_initialized = 0; /* 0: need to be init'ed by kgdb */
/* -------------------- END OF CONFIG --------------------- */
extern int kgdb_port;
#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
void putDebugChar(unsigned char c);
unsigned char getDebugChar(void);

2
arch/mips/sni/reset.c
View File

@@ -35,7 +35,7 @@ void sni_machine_restart(char *command)
kb_wait();
for (j = 0; j < 100000 ; j++)
/* nothing */;
outb_p(0xfe,0x64); /* pulse reset low */
outb_p(0xfe, 0x64); /* pulse reset low */
}
}
}

2
arch/mips/sni/sniprom.c
View File

@@ -233,7 +233,7 @@ void __init prom_init(void)
systype = "RM300-Exx";
break;
}
pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type,systype);
pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type, systype);
#ifdef DEBUG
sni_idprom_dump();

2
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
View File

@@ -176,7 +176,7 @@ static const u32 toshiba_rbtx4927_irq_debug_flag =
printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
}
#else
#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...)
#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag, str...)
#endif

4
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
View File

@@ -122,7 +122,7 @@ static const u32 toshiba_rbtx4927_setup_debug_flag =
printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
}
#else
#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag,str...)
#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag, str...)
#endif
/* These functions are used for rebooting or halting the machine*/
@@ -497,7 +497,7 @@ void __init tx4927_pci_setup(void)
"Internal");
called = 1;
}
printk("%s PCIC --%s PCICLK:",toshiba_name,
printk("%s PCIC --%s PCICLK:", toshiba_name,
(tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : "");
if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
int pciclk = 0;

4
arch/mips/tx4938/toshiba_rbtx4938/setup.c
View File

@@ -457,9 +457,9 @@ extern struct pci_controller tx4938_pci_controller[];
static int __init tx4938_pcibios_init(void)
{
unsigned long mem_base[2];
unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0,TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */
unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0, TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */
unsigned long io_base[2];
unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0,TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */
unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0, TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */
/* TX4938 PCIC1: 64K MEM/IO is enough for ETH0,ETH1 */
int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB);

6
arch/mips/vr41xx/nec-cmbvr4133/init.c
View File

@@ -36,7 +36,7 @@ void disable_pcnet(void)
*/
writel((2 << 16) |
(PCI_DEVFN(1,0) << 8) |
(PCI_DEVFN(1, 0) << 8) |
(0 & 0xfc) |
1UL,
PCICONFAREG);
@@ -44,7 +44,7 @@ void disable_pcnet(void)
data = readl(PCICONFDREG);
writel((2 << 16) |
(PCI_DEVFN(1,0) << 8) |
(PCI_DEVFN(1, 0) << 8) |
(4 & 0xfc) |
1UL,
PCICONFAREG);
@@ -52,7 +52,7 @@ void disable_pcnet(void)
data = readl(PCICONFDREG);
writel((2 << 16) |
(PCI_DEVFN(1,0) << 8) |
(PCI_DEVFN(1, 0) << 8) |
(4 & 0xfc) |
1UL,
PCICONFAREG);

6
arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
View File

@@ -38,7 +38,7 @@
outb_p((dev_no), DATA_PORT(port)); \
} while(0)
#define WRITE_CONFIG_DATA(port,index,data) \
#define WRITE_CONFIG_DATA(port, index, data) \
do { \
outb_p((index), INDEX_PORT(port)); \
outb_p((data), DATA_PORT(port)); \
@@ -206,8 +206,8 @@ static inline u16 ali_config_readw(u8 reg, int devfn)
int vr4133_rockhopper = 0;
void __init ali_m5229_preinit(void)
{
if (ali_config_readw(PCI_VENDOR_ID,16) == PCI_VENDOR_ID_AL &&
ali_config_readw(PCI_DEVICE_ID,16) == PCI_DEVICE_ID_AL_M1533) {
if (ali_config_readw(PCI_VENDOR_ID, 16) == PCI_VENDOR_ID_AL &&
ali_config_readw(PCI_DEVICE_ID, 16) == PCI_DEVICE_ID_AL_M1533) {
printk(KERN_INFO "Found an NEC Rockhopper \n");
vr4133_rockhopper = 1;
/*