drm/amd/pp: Remove the same struct define in powerplay
delete the same struct define in powerplay, share the struct with display. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -23,6 +23,8 @@
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#ifndef _DM_PP_INTERFACE_
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#define _DM_PP_INTERFACE_
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#include "dm_services_types.h"
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#define PP_MAX_CLOCK_LEVELS 16
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enum amd_pp_display_config_type{
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@@ -189,39 +191,4 @@ struct pp_display_clock_request {
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uint32_t clock_freq_in_khz;
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};
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#define PP_MAX_WM_SETS 4
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enum pp_wm_set_id {
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DC_WM_SET_A = 0,
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DC_WM_SET_B,
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DC_WM_SET_C,
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DC_WM_SET_D,
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DC_WM_SET_INVALID = 0xffff,
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};
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struct pp_wm_set_with_dmif_clock_range_soc15 {
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enum pp_wm_set_id wm_set_id;
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uint32_t wm_min_dcefclk_in_khz;
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uint32_t wm_max_dcefclk_in_khz;
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uint32_t wm_min_memclk_in_khz;
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uint32_t wm_max_memclk_in_khz;
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};
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struct pp_wm_set_with_mcif_clock_range_soc15 {
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enum pp_wm_set_id wm_set_id;
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uint32_t wm_min_socclk_in_khz;
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uint32_t wm_max_socclk_in_khz;
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uint32_t wm_min_memclk_in_khz;
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uint32_t wm_max_memclk_in_khz;
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};
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struct pp_wm_sets_with_clock_ranges_soc15 {
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uint32_t num_wm_sets_dmif;
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uint32_t num_wm_sets_mcif;
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struct pp_wm_set_with_dmif_clock_range_soc15
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wm_sets_dmif[PP_MAX_WM_SETS];
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struct pp_wm_set_with_mcif_clock_range_soc15
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wm_sets_mcif[PP_MAX_WM_SETS];
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};
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#endif /* _DM_PP_INTERFACE_ */
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