Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 mm updates from Thomas Gleixner: - Make lazy TLB mode even lazier to avoid pointless switch_mm() operations, which reduces CPU load by 1-2% for memcache workloads - Small cleanups and improvements all over the place * 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mm: Remove redundant check for kmem_cache_create() arm/asm/tlb.h: Fix build error implicit func declaration x86/mm/tlb: Make clear_asid_other() static x86/mm/tlb: Skip atomic operations for 'init_mm' in switch_mm_irqs_off() x86/mm/tlb: Always use lazy TLB mode x86/mm/tlb: Only send page table free TLB flush to lazy TLB CPUs x86/mm/tlb: Make lazy TLB mode lazier x86/mm/tlb: Restructure switch_mm_irqs_off() x86/mm/tlb: Leave lazy TLB mode at page table free time mm: Allocate the mm_cpumask (mm->cpu_bitmap[]) dynamically based on nr_cpu_ids x86/mm: Add TLB purge to free pmd/pte page interfaces ioremap: Update pgtable free interfaces with addr x86/mm: Disable ioremap free page handling on x86-PAE
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@@ -92,7 +92,7 @@ static inline int ioremap_pmd_range(pud_t *pud, unsigned long addr,
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if (ioremap_pmd_enabled() &&
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((next - addr) == PMD_SIZE) &&
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IS_ALIGNED(phys_addr + addr, PMD_SIZE) &&
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pmd_free_pte_page(pmd)) {
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pmd_free_pte_page(pmd, addr)) {
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if (pmd_set_huge(pmd, phys_addr + addr, prot))
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continue;
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}
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@@ -119,7 +119,7 @@ static inline int ioremap_pud_range(p4d_t *p4d, unsigned long addr,
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if (ioremap_pud_enabled() &&
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((next - addr) == PUD_SIZE) &&
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IS_ALIGNED(phys_addr + addr, PUD_SIZE) &&
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pud_free_pmd_page(pud)) {
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pud_free_pmd_page(pud, addr)) {
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if (pud_set_huge(pud, phys_addr + addr, prot))
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continue;
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}
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