ASoC: Intel: Skylake: Reset DSP pipe when host/link DMA is reset
In case of XRUN recovery PCM prepare will be called. In this case Host/Link DMAs are reset and reconfigured, hence the corresponding FE/BE pipe needs to be reset in order to get to a clean state. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@@ -1130,6 +1130,29 @@ int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
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return 0;
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}
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/*
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* Reset the pipeline by sending set pipe state IPC this will reset the DMA
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* from the DSP side
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*/
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int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
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{
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int ret;
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/* If pipe was not created in FW, do not try to pause or delete */
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if (pipe->state < SKL_PIPE_PAUSED)
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return 0;
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ret = skl_set_pipe_state(ctx, pipe, PPL_RESET);
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if (ret < 0) {
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dev_dbg(ctx->dev, "Failed to reset pipe ret=%d\n", ret);
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return ret;
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}
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pipe->state = SKL_PIPE_RESET;
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return 0;
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}
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/* Algo parameter set helper function */
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int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
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u32 param_id, struct skl_module_cfg *mcfg)
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