ASoC: Intel: bxtn: Update DSP core state in D0

In system suspend, firmware needs to be re-downloaded as IMR is cleared.
When firmware is downloaded in D0, core state is not set to running
state causing instability with subsequent D0-D3 cycles.

So set the core state correctly during D0 and check the DSP core state
if not in reset to set the DSP to D3.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

sound/soc/intel/skylake/bxt-sst.c

@@ -446,6 +446,7 @@ static int bxt_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id)
 				return ret;
 			}
 		}
+		skl->cores.state[core_id] = SKL_DSP_RUNNING;
 		return ret;
 	}