Merge branch 'for-next/52-bit-pa' into for-next/core
* for-next/52-bit-pa: arm64: enable 52-bit physical address support arm64: allow ID map to be extended to 52 bits arm64: handle 52-bit physical addresses in page table entries arm64: don't open code page table entry creation arm64: head.S: handle 52-bit PAs in PTEs in early page table setup arm64: handle 52-bit addresses in TTBR arm64: limit PA size to supported range arm64: add kconfig symbol to configure physical address size
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@@ -50,6 +50,7 @@
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#define NO_CONT_MAPPINGS BIT(1)
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u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
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u64 idmap_ptrs_per_pgd = PTRS_PER_PGD;
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u64 kimage_voffset __ro_after_init;
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EXPORT_SYMBOL(kimage_voffset);
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@@ -601,8 +602,8 @@ static void __init map_kernel(pgd_t *pgd)
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* entry instead.
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*/
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BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
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set_pud(pud_set_fixmap_offset(pgd, FIXADDR_START),
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__pud(__pa_symbol(bm_pmd) | PUD_TYPE_TABLE));
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pud_populate(&init_mm, pud_set_fixmap_offset(pgd, FIXADDR_START),
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lm_alias(bm_pmd));
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pud_clear_fixmap();
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} else {
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BUG();
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@@ -717,7 +718,7 @@ int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
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if (!p)
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return -ENOMEM;
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set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL));
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pmd_set_huge(pmd, __pa(p), __pgprot(PROT_SECT_NORMAL));
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} else
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vmemmap_verify((pte_t *)pmd, node, addr, next);
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} while (addr = next, addr != end);
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@@ -910,15 +911,19 @@ int __init arch_ioremap_pmd_supported(void)
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int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot)
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{
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pgprot_t sect_prot = __pgprot(PUD_TYPE_SECT |
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pgprot_val(mk_sect_prot(prot)));
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BUG_ON(phys & ~PUD_MASK);
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set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
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set_pud(pud, pfn_pud(__phys_to_pfn(phys), sect_prot));
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return 1;
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}
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int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot)
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{
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pgprot_t sect_prot = __pgprot(PMD_TYPE_SECT |
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pgprot_val(mk_sect_prot(prot)));
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BUG_ON(phys & ~PMD_MASK);
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set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
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set_pmd(pmd, pfn_pmd(__phys_to_pfn(phys), sect_prot));
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return 1;
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}
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