sh: Prepare for dynamic PMB support
To allow the MMU to be switched between 29bit and 32bit mode at runtime some constants need to swapped for functions that return a runtime value. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@@ -88,12 +88,12 @@ static inline void flush_cache_4096(unsigned long start,
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unsigned long flags, exec_offset = 0;
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/*
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* All types of SH-4 require PC to be in P2 to operate on the I-cache.
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* Some types of SH-4 require PC to be in P2 to operate on the D-cache.
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* All types of SH-4 require PC to be uncached to operate on the I-cache.
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* Some types of SH-4 require PC to be uncached to operate on the D-cache.
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*/
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if ((boot_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) ||
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(start < CACHE_OC_ADDRESS_ARRAY))
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exec_offset = 0x20000000;
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exec_offset = cached_to_uncached;
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local_irq_save(flags);
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__flush_cache_4096(start | SH_CACHE_ASSOC,
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@@ -323,4 +323,12 @@ int memory_add_physaddr_to_nid(u64 addr)
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}
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EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
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#endif
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#endif /* CONFIG_MEMORY_HOTPLUG */
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#ifdef CONFIG_PMB
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int __in_29bit_mode(void)
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{
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return !(ctrl_inl(PMB_PASCR) & PASCR_SE);
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}
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#endif /* CONFIG_PMB */
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