Merge branch 'fixes-non-critical' into next/drivers2
fixes-non-critical has already been merged upstream, and there are a handful of annoying context conflicts that it makes sense to resolve before sending up. Part of this is because there was parallel development going on between more urgent fixes and general driver fixups, it should settle down once the lpc32xx platform reaches a more steady state. Conflicts: arch/arm/mach-lpc32xx/clock.c arch/arm/mach-lpc32xx/common.h Signed-off-by: Olof Johansson <olof@lixom.net>
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@@ -95,7 +95,7 @@ static int davinci_target(struct cpufreq_policy *policy,
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if (freqs.old == freqs.new)
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return ret;
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dev_dbg(&cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
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dev_dbg(cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
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ret = cpufreq_frequency_table_target(policy, pdata->freq_table,
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freqs.new, relation, &idx);
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@@ -1026,7 +1026,7 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate)
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}
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#endif
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int da850_register_pm(struct platform_device *pdev)
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int __init da850_register_pm(struct platform_device *pdev)
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{
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int ret;
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struct davinci_pm_config *pdata = pdev->dev.platform_data;
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@@ -1508,12 +1508,8 @@ static int __init edma_probe(struct platform_device *pdev)
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goto fail;
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}
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/* Everything lives on transfer controller 1 until otherwise
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* specified. This way, long transfers on the low priority queue
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* started by the codec engine will not cause audio defects.
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*/
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for (i = 0; i < edma_cc[j]->num_channels; i++)
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map_dmach_queue(j, i, EVENTQ_1);
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map_dmach_queue(j, i, info[j]->default_queue);
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queue_tc_mapping = info[j]->queue_tc_mapping;
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queue_priority_mapping = info[j]->queue_priority_mapping;
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@@ -250,6 +250,11 @@ struct edma_soc_info {
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unsigned n_slot;
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unsigned n_tc;
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unsigned n_cc;
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/*
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* Default queue is expected to be a low-priority queue.
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* This way, long transfers on the default queue started
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* by the codec engine will not cause audio defects.
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*/
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enum dma_event_q default_queue;
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/* Resource reservation for other cores */
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