Merge branch 'for-4.17/libnvdimm' into libnvdimm-for-next
このコミットが含まれているのは:
@@ -104,7 +104,8 @@ enum {
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NUM_HINTS = 8,
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NUM_BDW = NUM_DCR,
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NUM_SPA = NUM_PM + NUM_DCR + NUM_BDW,
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NUM_MEM = NUM_DCR + NUM_BDW + 2 /* spa0 iset */ + 4 /* spa1 iset */,
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NUM_MEM = NUM_DCR + NUM_BDW + 2 /* spa0 iset */
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+ 4 /* spa1 iset */ + 1 /* spa11 iset */,
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DIMM_SIZE = SZ_32M,
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LABEL_SIZE = SZ_128K,
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SPA_VCD_SIZE = SZ_4M,
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@@ -153,6 +154,7 @@ struct nfit_test {
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void *nfit_buf;
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dma_addr_t nfit_dma;
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size_t nfit_size;
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size_t nfit_filled;
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int dcr_idx;
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int num_dcr;
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int num_pm;
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@@ -709,7 +711,9 @@ static void smart_notify(struct device *bus_dev,
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>= thresh->media_temperature)
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|| ((thresh->alarm_control & ND_INTEL_SMART_CTEMP_TRIP)
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&& smart->ctrl_temperature
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>= thresh->ctrl_temperature)) {
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>= thresh->ctrl_temperature)
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|| (smart->health != ND_INTEL_SMART_NON_CRITICAL_HEALTH)
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|| (smart->shutdown_state != 0)) {
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device_lock(bus_dev);
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__acpi_nvdimm_notify(dimm_dev, 0x81);
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device_unlock(bus_dev);
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@@ -735,6 +739,32 @@ static int nfit_test_cmd_smart_set_threshold(
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return 0;
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}
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static int nfit_test_cmd_smart_inject(
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struct nd_intel_smart_inject *inj,
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unsigned int buf_len,
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struct nd_intel_smart_threshold *thresh,
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struct nd_intel_smart *smart,
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struct device *bus_dev, struct device *dimm_dev)
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{
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if (buf_len != sizeof(*inj))
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return -EINVAL;
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if (inj->mtemp_enable)
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smart->media_temperature = inj->media_temperature;
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if (inj->spare_enable)
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smart->spares = inj->spares;
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if (inj->fatal_enable)
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smart->health = ND_INTEL_SMART_FATAL_HEALTH;
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if (inj->unsafe_shutdown_enable) {
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smart->shutdown_state = 1;
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smart->shutdown_count++;
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}
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inj->status = 0;
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smart_notify(bus_dev, dimm_dev, smart, thresh);
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return 0;
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}
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static void uc_error_notify(struct work_struct *work)
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{
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struct nfit_test *t = container_of(work, typeof(*t), work);
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@@ -935,6 +965,13 @@ static int nfit_test_ctl(struct nvdimm_bus_descriptor *nd_desc,
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t->dcr_idx],
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&t->smart[i - t->dcr_idx],
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&t->pdev.dev, t->dimm_dev[i]);
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case ND_INTEL_SMART_INJECT:
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return nfit_test_cmd_smart_inject(buf,
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buf_len,
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&t->smart_threshold[i -
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t->dcr_idx],
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&t->smart[i - t->dcr_idx],
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&t->pdev.dev, t->dimm_dev[i]);
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default:
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return -ENOTTY;
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}
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@@ -1222,7 +1259,7 @@ static void smart_init(struct nfit_test *t)
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| ND_INTEL_SMART_MTEMP_VALID,
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.health = ND_INTEL_SMART_NON_CRITICAL_HEALTH,
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.media_temperature = 23 * 16,
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.ctrl_temperature = 30 * 16,
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.ctrl_temperature = 25 * 16,
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.pmic_temperature = 40 * 16,
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.spares = 75,
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.alarm_flags = ND_INTEL_SMART_SPARE_TRIP
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@@ -1366,7 +1403,7 @@ static void nfit_test0_setup(struct nfit_test *t)
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struct acpi_nfit_data_region *bdw;
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struct acpi_nfit_flush_address *flush;
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struct acpi_nfit_capabilities *pcap;
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unsigned int offset, i;
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unsigned int offset = 0, i;
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/*
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* spa0 (interleave first half of dimm0 and dimm1, note storage
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@@ -1380,93 +1417,102 @@ static void nfit_test0_setup(struct nfit_test *t)
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spa->range_index = 0+1;
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spa->address = t->spa_set_dma[0];
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spa->length = SPA0_SIZE;
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offset += spa->header.length;
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/*
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* spa1 (interleave last half of the 4 DIMMS, note storage
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* does not actually alias the related block-data-window
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* regions)
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*/
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spa = nfit_buf + sizeof(*spa);
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spa = nfit_buf + offset;
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spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
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spa->header.length = sizeof(*spa);
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memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
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spa->range_index = 1+1;
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spa->address = t->spa_set_dma[1];
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spa->length = SPA1_SIZE;
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offset += spa->header.length;
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/* spa2 (dcr0) dimm0 */
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spa = nfit_buf + sizeof(*spa) * 2;
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spa = nfit_buf + offset;
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spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
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spa->header.length = sizeof(*spa);
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memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
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spa->range_index = 2+1;
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spa->address = t->dcr_dma[0];
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spa->length = DCR_SIZE;
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offset += spa->header.length;
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/* spa3 (dcr1) dimm1 */
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spa = nfit_buf + sizeof(*spa) * 3;
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spa = nfit_buf + offset;
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spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
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spa->header.length = sizeof(*spa);
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memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
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spa->range_index = 3+1;
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spa->address = t->dcr_dma[1];
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spa->length = DCR_SIZE;
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offset += spa->header.length;
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/* spa4 (dcr2) dimm2 */
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spa = nfit_buf + sizeof(*spa) * 4;
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spa = nfit_buf + offset;
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spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
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spa->header.length = sizeof(*spa);
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memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
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spa->range_index = 4+1;
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spa->address = t->dcr_dma[2];
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spa->length = DCR_SIZE;
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offset += spa->header.length;
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/* spa5 (dcr3) dimm3 */
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spa = nfit_buf + sizeof(*spa) * 5;
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spa = nfit_buf + offset;
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spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
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spa->header.length = sizeof(*spa);
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memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
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spa->range_index = 5+1;
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spa->address = t->dcr_dma[3];
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spa->length = DCR_SIZE;
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offset += spa->header.length;
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/* spa6 (bdw for dcr0) dimm0 */
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spa = nfit_buf + sizeof(*spa) * 6;
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spa = nfit_buf + offset;
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spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
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spa->header.length = sizeof(*spa);
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memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
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spa->range_index = 6+1;
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spa->address = t->dimm_dma[0];
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spa->length = DIMM_SIZE;
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offset += spa->header.length;
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/* spa7 (bdw for dcr1) dimm1 */
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spa = nfit_buf + sizeof(*spa) * 7;
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spa = nfit_buf + offset;
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spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
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spa->header.length = sizeof(*spa);
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memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
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spa->range_index = 7+1;
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spa->address = t->dimm_dma[1];
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spa->length = DIMM_SIZE;
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offset += spa->header.length;
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/* spa8 (bdw for dcr2) dimm2 */
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spa = nfit_buf + sizeof(*spa) * 8;
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spa = nfit_buf + offset;
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spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
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spa->header.length = sizeof(*spa);
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memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
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spa->range_index = 8+1;
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spa->address = t->dimm_dma[2];
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spa->length = DIMM_SIZE;
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offset += spa->header.length;
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/* spa9 (bdw for dcr3) dimm3 */
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spa = nfit_buf + sizeof(*spa) * 9;
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spa = nfit_buf + offset;
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spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
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spa->header.length = sizeof(*spa);
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memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
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spa->range_index = 9+1;
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spa->address = t->dimm_dma[3];
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spa->length = DIMM_SIZE;
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offset += spa->header.length;
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offset = sizeof(*spa) * 10;
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/* mem-region0 (spa0, dimm0) */
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memdev = nfit_buf + offset;
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memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
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@@ -1481,9 +1527,10 @@ static void nfit_test0_setup(struct nfit_test *t)
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memdev->address = 0;
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memdev->interleave_index = 0;
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memdev->interleave_ways = 2;
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offset += memdev->header.length;
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/* mem-region1 (spa0, dimm1) */
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memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map);
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memdev = nfit_buf + offset;
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memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
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memdev->header.length = sizeof(*memdev);
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memdev->device_handle = handle[1];
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@@ -1497,9 +1544,10 @@ static void nfit_test0_setup(struct nfit_test *t)
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memdev->interleave_index = 0;
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memdev->interleave_ways = 2;
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memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
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offset += memdev->header.length;
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/* mem-region2 (spa1, dimm0) */
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memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 2;
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memdev = nfit_buf + offset;
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memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
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memdev->header.length = sizeof(*memdev);
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memdev->device_handle = handle[0];
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@@ -1513,9 +1561,10 @@ static void nfit_test0_setup(struct nfit_test *t)
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memdev->interleave_index = 0;
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memdev->interleave_ways = 4;
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memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
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offset += memdev->header.length;
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/* mem-region3 (spa1, dimm1) */
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memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 3;
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memdev = nfit_buf + offset;
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memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
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memdev->header.length = sizeof(*memdev);
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memdev->device_handle = handle[1];
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@@ -1528,9 +1577,10 @@ static void nfit_test0_setup(struct nfit_test *t)
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memdev->address = SPA0_SIZE/2;
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memdev->interleave_index = 0;
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memdev->interleave_ways = 4;
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offset += memdev->header.length;
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/* mem-region4 (spa1, dimm2) */
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memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 4;
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memdev = nfit_buf + offset;
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memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
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memdev->header.length = sizeof(*memdev);
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memdev->device_handle = handle[2];
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@@ -1544,9 +1594,10 @@ static void nfit_test0_setup(struct nfit_test *t)
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memdev->interleave_index = 0;
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memdev->interleave_ways = 4;
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memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
|
||||
offset += memdev->header.length;
|
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/* mem-region5 (spa1, dimm3) */
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||||
memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 5;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[3];
|
||||
@@ -1559,9 +1610,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = SPA0_SIZE/2;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 4;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region6 (spa/dcr0, dimm0) */
|
||||
memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 6;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[0];
|
||||
@@ -1574,9 +1626,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = 0;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region7 (spa/dcr1, dimm1) */
|
||||
memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 7;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[1];
|
||||
@@ -1589,9 +1642,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = 0;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region8 (spa/dcr2, dimm2) */
|
||||
memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 8;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[2];
|
||||
@@ -1604,9 +1658,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = 0;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region9 (spa/dcr3, dimm3) */
|
||||
memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 9;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[3];
|
||||
@@ -1619,9 +1674,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = 0;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region10 (spa/bdw0, dimm0) */
|
||||
memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 10;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[0];
|
||||
@@ -1634,9 +1690,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = 0;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region11 (spa/bdw1, dimm1) */
|
||||
memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 11;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[1];
|
||||
@@ -1649,9 +1706,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = 0;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region12 (spa/bdw2, dimm2) */
|
||||
memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 12;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[2];
|
||||
@@ -1664,9 +1722,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = 0;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region13 (spa/dcr3, dimm3) */
|
||||
memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 13;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[3];
|
||||
@@ -1680,12 +1739,12 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
|
||||
offset += memdev->header.length;
|
||||
|
||||
offset = offset + sizeof(struct acpi_nfit_memory_map) * 14;
|
||||
/* dcr-descriptor0: blk */
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
dcr->header.length = sizeof(struct acpi_nfit_control_region);
|
||||
dcr->header.length = sizeof(*dcr);
|
||||
dcr->region_index = 0+1;
|
||||
dcr_common_init(dcr);
|
||||
dcr->serial_number = ~handle[0];
|
||||
@@ -1696,11 +1755,12 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->command_size = 8;
|
||||
dcr->status_offset = 8;
|
||||
dcr->status_size = 4;
|
||||
offset += dcr->header.length;
|
||||
|
||||
/* dcr-descriptor1: blk */
|
||||
dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region);
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
dcr->header.length = sizeof(struct acpi_nfit_control_region);
|
||||
dcr->header.length = sizeof(*dcr);
|
||||
dcr->region_index = 1+1;
|
||||
dcr_common_init(dcr);
|
||||
dcr->serial_number = ~handle[1];
|
||||
@@ -1711,11 +1771,12 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->command_size = 8;
|
||||
dcr->status_offset = 8;
|
||||
dcr->status_size = 4;
|
||||
offset += dcr->header.length;
|
||||
|
||||
/* dcr-descriptor2: blk */
|
||||
dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 2;
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
dcr->header.length = sizeof(struct acpi_nfit_control_region);
|
||||
dcr->header.length = sizeof(*dcr);
|
||||
dcr->region_index = 2+1;
|
||||
dcr_common_init(dcr);
|
||||
dcr->serial_number = ~handle[2];
|
||||
@@ -1726,11 +1787,12 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->command_size = 8;
|
||||
dcr->status_offset = 8;
|
||||
dcr->status_size = 4;
|
||||
offset += dcr->header.length;
|
||||
|
||||
/* dcr-descriptor3: blk */
|
||||
dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 3;
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
dcr->header.length = sizeof(struct acpi_nfit_control_region);
|
||||
dcr->header.length = sizeof(*dcr);
|
||||
dcr->region_index = 3+1;
|
||||
dcr_common_init(dcr);
|
||||
dcr->serial_number = ~handle[3];
|
||||
@@ -1741,8 +1803,8 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->command_size = 8;
|
||||
dcr->status_offset = 8;
|
||||
dcr->status_size = 4;
|
||||
offset += dcr->header.length;
|
||||
|
||||
offset = offset + sizeof(struct acpi_nfit_control_region) * 4;
|
||||
/* dcr-descriptor0: pmem */
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
@@ -1753,10 +1815,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->serial_number = ~handle[0];
|
||||
dcr->code = NFIT_FIC_BYTEN;
|
||||
dcr->windows = 0;
|
||||
offset += dcr->header.length;
|
||||
|
||||
/* dcr-descriptor1: pmem */
|
||||
dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
|
||||
window_size);
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
dcr->header.length = offsetof(struct acpi_nfit_control_region,
|
||||
window_size);
|
||||
@@ -1765,10 +1827,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->serial_number = ~handle[1];
|
||||
dcr->code = NFIT_FIC_BYTEN;
|
||||
dcr->windows = 0;
|
||||
offset += dcr->header.length;
|
||||
|
||||
/* dcr-descriptor2: pmem */
|
||||
dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
|
||||
window_size) * 2;
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
dcr->header.length = offsetof(struct acpi_nfit_control_region,
|
||||
window_size);
|
||||
@@ -1777,10 +1839,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->serial_number = ~handle[2];
|
||||
dcr->code = NFIT_FIC_BYTEN;
|
||||
dcr->windows = 0;
|
||||
offset += dcr->header.length;
|
||||
|
||||
/* dcr-descriptor3: pmem */
|
||||
dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
|
||||
window_size) * 3;
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
dcr->header.length = offsetof(struct acpi_nfit_control_region,
|
||||
window_size);
|
||||
@@ -1789,54 +1851,56 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->serial_number = ~handle[3];
|
||||
dcr->code = NFIT_FIC_BYTEN;
|
||||
dcr->windows = 0;
|
||||
offset += dcr->header.length;
|
||||
|
||||
offset = offset + offsetof(struct acpi_nfit_control_region,
|
||||
window_size) * 4;
|
||||
/* bdw0 (spa/dcr0, dimm0) */
|
||||
bdw = nfit_buf + offset;
|
||||
bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
|
||||
bdw->header.length = sizeof(struct acpi_nfit_data_region);
|
||||
bdw->header.length = sizeof(*bdw);
|
||||
bdw->region_index = 0+1;
|
||||
bdw->windows = 1;
|
||||
bdw->offset = 0;
|
||||
bdw->size = BDW_SIZE;
|
||||
bdw->capacity = DIMM_SIZE;
|
||||
bdw->start_address = 0;
|
||||
offset += bdw->header.length;
|
||||
|
||||
/* bdw1 (spa/dcr1, dimm1) */
|
||||
bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region);
|
||||
bdw = nfit_buf + offset;
|
||||
bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
|
||||
bdw->header.length = sizeof(struct acpi_nfit_data_region);
|
||||
bdw->header.length = sizeof(*bdw);
|
||||
bdw->region_index = 1+1;
|
||||
bdw->windows = 1;
|
||||
bdw->offset = 0;
|
||||
bdw->size = BDW_SIZE;
|
||||
bdw->capacity = DIMM_SIZE;
|
||||
bdw->start_address = 0;
|
||||
offset += bdw->header.length;
|
||||
|
||||
/* bdw2 (spa/dcr2, dimm2) */
|
||||
bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 2;
|
||||
bdw = nfit_buf + offset;
|
||||
bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
|
||||
bdw->header.length = sizeof(struct acpi_nfit_data_region);
|
||||
bdw->header.length = sizeof(*bdw);
|
||||
bdw->region_index = 2+1;
|
||||
bdw->windows = 1;
|
||||
bdw->offset = 0;
|
||||
bdw->size = BDW_SIZE;
|
||||
bdw->capacity = DIMM_SIZE;
|
||||
bdw->start_address = 0;
|
||||
offset += bdw->header.length;
|
||||
|
||||
/* bdw3 (spa/dcr3, dimm3) */
|
||||
bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 3;
|
||||
bdw = nfit_buf + offset;
|
||||
bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
|
||||
bdw->header.length = sizeof(struct acpi_nfit_data_region);
|
||||
bdw->header.length = sizeof(*bdw);
|
||||
bdw->region_index = 3+1;
|
||||
bdw->windows = 1;
|
||||
bdw->offset = 0;
|
||||
bdw->size = BDW_SIZE;
|
||||
bdw->capacity = DIMM_SIZE;
|
||||
bdw->start_address = 0;
|
||||
offset += bdw->header.length;
|
||||
|
||||
offset = offset + sizeof(struct acpi_nfit_data_region) * 4;
|
||||
/* flush0 (dimm0) */
|
||||
flush = nfit_buf + offset;
|
||||
flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
|
||||
@@ -1845,48 +1909,52 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
flush->hint_count = NUM_HINTS;
|
||||
for (i = 0; i < NUM_HINTS; i++)
|
||||
flush->hint_address[i] = t->flush_dma[0] + i * sizeof(u64);
|
||||
offset += flush->header.length;
|
||||
|
||||
/* flush1 (dimm1) */
|
||||
flush = nfit_buf + offset + flush_hint_size * 1;
|
||||
flush = nfit_buf + offset;
|
||||
flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
|
||||
flush->header.length = flush_hint_size;
|
||||
flush->device_handle = handle[1];
|
||||
flush->hint_count = NUM_HINTS;
|
||||
for (i = 0; i < NUM_HINTS; i++)
|
||||
flush->hint_address[i] = t->flush_dma[1] + i * sizeof(u64);
|
||||
offset += flush->header.length;
|
||||
|
||||
/* flush2 (dimm2) */
|
||||
flush = nfit_buf + offset + flush_hint_size * 2;
|
||||
flush = nfit_buf + offset;
|
||||
flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
|
||||
flush->header.length = flush_hint_size;
|
||||
flush->device_handle = handle[2];
|
||||
flush->hint_count = NUM_HINTS;
|
||||
for (i = 0; i < NUM_HINTS; i++)
|
||||
flush->hint_address[i] = t->flush_dma[2] + i * sizeof(u64);
|
||||
offset += flush->header.length;
|
||||
|
||||
/* flush3 (dimm3) */
|
||||
flush = nfit_buf + offset + flush_hint_size * 3;
|
||||
flush = nfit_buf + offset;
|
||||
flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
|
||||
flush->header.length = flush_hint_size;
|
||||
flush->device_handle = handle[3];
|
||||
flush->hint_count = NUM_HINTS;
|
||||
for (i = 0; i < NUM_HINTS; i++)
|
||||
flush->hint_address[i] = t->flush_dma[3] + i * sizeof(u64);
|
||||
offset += flush->header.length;
|
||||
|
||||
/* platform capabilities */
|
||||
pcap = nfit_buf + offset + flush_hint_size * 4;
|
||||
pcap = nfit_buf + offset;
|
||||
pcap->header.type = ACPI_NFIT_TYPE_CAPABILITIES;
|
||||
pcap->header.length = sizeof(*pcap);
|
||||
pcap->highest_capability = 1;
|
||||
pcap->capabilities = ACPI_NFIT_CAPABILITY_CACHE_FLUSH |
|
||||
ACPI_NFIT_CAPABILITY_MEM_FLUSH;
|
||||
offset += pcap->header.length;
|
||||
|
||||
if (t->setup_hotplug) {
|
||||
offset = offset + flush_hint_size * 4 + sizeof(*pcap);
|
||||
/* dcr-descriptor4: blk */
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
dcr->header.length = sizeof(struct acpi_nfit_control_region);
|
||||
dcr->header.length = sizeof(*dcr);
|
||||
dcr->region_index = 8+1;
|
||||
dcr_common_init(dcr);
|
||||
dcr->serial_number = ~handle[4];
|
||||
@@ -1897,8 +1965,8 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->command_size = 8;
|
||||
dcr->status_offset = 8;
|
||||
dcr->status_size = 4;
|
||||
offset += dcr->header.length;
|
||||
|
||||
offset = offset + sizeof(struct acpi_nfit_control_region);
|
||||
/* dcr-descriptor4: pmem */
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
@@ -1909,21 +1977,20 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
dcr->serial_number = ~handle[4];
|
||||
dcr->code = NFIT_FIC_BYTEN;
|
||||
dcr->windows = 0;
|
||||
offset += dcr->header.length;
|
||||
|
||||
offset = offset + offsetof(struct acpi_nfit_control_region,
|
||||
window_size);
|
||||
/* bdw4 (spa/dcr4, dimm4) */
|
||||
bdw = nfit_buf + offset;
|
||||
bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
|
||||
bdw->header.length = sizeof(struct acpi_nfit_data_region);
|
||||
bdw->header.length = sizeof(*bdw);
|
||||
bdw->region_index = 8+1;
|
||||
bdw->windows = 1;
|
||||
bdw->offset = 0;
|
||||
bdw->size = BDW_SIZE;
|
||||
bdw->capacity = DIMM_SIZE;
|
||||
bdw->start_address = 0;
|
||||
offset += bdw->header.length;
|
||||
|
||||
offset = offset + sizeof(struct acpi_nfit_data_region);
|
||||
/* spa10 (dcr4) dimm4 */
|
||||
spa = nfit_buf + offset;
|
||||
spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
|
||||
@@ -1932,30 +1999,32 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
spa->range_index = 10+1;
|
||||
spa->address = t->dcr_dma[4];
|
||||
spa->length = DCR_SIZE;
|
||||
offset += spa->header.length;
|
||||
|
||||
/*
|
||||
* spa11 (single-dimm interleave for hotplug, note storage
|
||||
* does not actually alias the related block-data-window
|
||||
* regions)
|
||||
*/
|
||||
spa = nfit_buf + offset + sizeof(*spa);
|
||||
spa = nfit_buf + offset;
|
||||
spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
|
||||
spa->header.length = sizeof(*spa);
|
||||
memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
|
||||
spa->range_index = 11+1;
|
||||
spa->address = t->spa_set_dma[2];
|
||||
spa->length = SPA0_SIZE;
|
||||
offset += spa->header.length;
|
||||
|
||||
/* spa12 (bdw for dcr4) dimm4 */
|
||||
spa = nfit_buf + offset + sizeof(*spa) * 2;
|
||||
spa = nfit_buf + offset;
|
||||
spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
|
||||
spa->header.length = sizeof(*spa);
|
||||
memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
|
||||
spa->range_index = 12+1;
|
||||
spa->address = t->dimm_dma[4];
|
||||
spa->length = DIMM_SIZE;
|
||||
offset += spa->header.length;
|
||||
|
||||
offset = offset + sizeof(*spa) * 3;
|
||||
/* mem-region14 (spa/dcr4, dimm4) */
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
@@ -1970,10 +2039,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = 0;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region15 (spa0, dimm4) */
|
||||
memdev = nfit_buf + offset +
|
||||
sizeof(struct acpi_nfit_memory_map);
|
||||
/* mem-region15 (spa11, dimm4) */
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[4];
|
||||
@@ -1987,10 +2056,10 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* mem-region16 (spa/bdw4, dimm4) */
|
||||
memdev = nfit_buf + offset +
|
||||
sizeof(struct acpi_nfit_memory_map) * 2;
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
memdev->device_handle = handle[4];
|
||||
@@ -2003,8 +2072,8 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
memdev->address = 0;
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
offset += memdev->header.length;
|
||||
|
||||
offset = offset + sizeof(struct acpi_nfit_memory_map) * 3;
|
||||
/* flush3 (dimm4) */
|
||||
flush = nfit_buf + offset;
|
||||
flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
|
||||
@@ -2014,8 +2083,14 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
for (i = 0; i < NUM_HINTS; i++)
|
||||
flush->hint_address[i] = t->flush_dma[4]
|
||||
+ i * sizeof(u64);
|
||||
offset += flush->header.length;
|
||||
|
||||
/* sanity check to make sure we've filled the buffer */
|
||||
WARN_ON(offset != t->nfit_size);
|
||||
}
|
||||
|
||||
t->nfit_filled = offset;
|
||||
|
||||
post_ars_status(&t->ars_state, &t->badrange, t->spa_set_dma[0],
|
||||
SPA0_SIZE);
|
||||
|
||||
@@ -2026,6 +2101,7 @@ static void nfit_test0_setup(struct nfit_test *t)
|
||||
set_bit(ND_INTEL_SMART, &acpi_desc->dimm_cmd_force_en);
|
||||
set_bit(ND_INTEL_SMART_THRESHOLD, &acpi_desc->dimm_cmd_force_en);
|
||||
set_bit(ND_INTEL_SMART_SET_THRESHOLD, &acpi_desc->dimm_cmd_force_en);
|
||||
set_bit(ND_INTEL_SMART_INJECT, &acpi_desc->dimm_cmd_force_en);
|
||||
set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en);
|
||||
set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en);
|
||||
set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en);
|
||||
@@ -2061,17 +2137,18 @@ static void nfit_test1_setup(struct nfit_test *t)
|
||||
spa->range_index = 0+1;
|
||||
spa->address = t->spa_set_dma[0];
|
||||
spa->length = SPA2_SIZE;
|
||||
offset += spa->header.length;
|
||||
|
||||
/* virtual cd region */
|
||||
spa = nfit_buf + sizeof(*spa);
|
||||
spa = nfit_buf + offset;
|
||||
spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
|
||||
spa->header.length = sizeof(*spa);
|
||||
memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_VCD), 16);
|
||||
spa->range_index = 0;
|
||||
spa->address = t->spa_set_dma[1];
|
||||
spa->length = SPA_VCD_SIZE;
|
||||
offset += spa->header.length;
|
||||
|
||||
offset += sizeof(*spa) * 2;
|
||||
/* mem-region0 (spa0, dimm0) */
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
@@ -2089,8 +2166,8 @@ static void nfit_test1_setup(struct nfit_test *t)
|
||||
memdev->flags = ACPI_NFIT_MEM_SAVE_FAILED | ACPI_NFIT_MEM_RESTORE_FAILED
|
||||
| ACPI_NFIT_MEM_FLUSH_FAILED | ACPI_NFIT_MEM_HEALTH_OBSERVED
|
||||
| ACPI_NFIT_MEM_NOT_ARMED;
|
||||
offset += memdev->header.length;
|
||||
|
||||
offset += sizeof(*memdev);
|
||||
/* dcr-descriptor0 */
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
@@ -2101,8 +2178,8 @@ static void nfit_test1_setup(struct nfit_test *t)
|
||||
dcr->serial_number = ~handle[5];
|
||||
dcr->code = NFIT_FIC_BYTE;
|
||||
dcr->windows = 0;
|
||||
|
||||
offset += dcr->header.length;
|
||||
|
||||
memdev = nfit_buf + offset;
|
||||
memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
|
||||
memdev->header.length = sizeof(*memdev);
|
||||
@@ -2117,9 +2194,9 @@ static void nfit_test1_setup(struct nfit_test *t)
|
||||
memdev->interleave_index = 0;
|
||||
memdev->interleave_ways = 1;
|
||||
memdev->flags = ACPI_NFIT_MEM_MAP_FAILED;
|
||||
offset += memdev->header.length;
|
||||
|
||||
/* dcr-descriptor1 */
|
||||
offset += sizeof(*memdev);
|
||||
dcr = nfit_buf + offset;
|
||||
dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
|
||||
dcr->header.length = offsetof(struct acpi_nfit_control_region,
|
||||
@@ -2129,6 +2206,12 @@ static void nfit_test1_setup(struct nfit_test *t)
|
||||
dcr->serial_number = ~handle[6];
|
||||
dcr->code = NFIT_FIC_BYTE;
|
||||
dcr->windows = 0;
|
||||
offset += dcr->header.length;
|
||||
|
||||
/* sanity check to make sure we've filled the buffer */
|
||||
WARN_ON(offset != t->nfit_size);
|
||||
|
||||
t->nfit_filled = offset;
|
||||
|
||||
post_ars_status(&t->ars_state, &t->badrange, t->spa_set_dma[0],
|
||||
SPA2_SIZE);
|
||||
@@ -2487,7 +2570,7 @@ static int nfit_test_probe(struct platform_device *pdev)
|
||||
nd_desc->ndctl = nfit_test_ctl;
|
||||
|
||||
rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_buf,
|
||||
nfit_test->nfit_size);
|
||||
nfit_test->nfit_filled);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
|
@@ -93,6 +93,7 @@ struct nd_cmd_ars_err_inj_stat {
|
||||
#define ND_INTEL_FW_FINISH_UPDATE 15
|
||||
#define ND_INTEL_FW_FINISH_QUERY 16
|
||||
#define ND_INTEL_SMART_SET_THRESHOLD 17
|
||||
#define ND_INTEL_SMART_INJECT 18
|
||||
|
||||
#define ND_INTEL_SMART_HEALTH_VALID (1 << 0)
|
||||
#define ND_INTEL_SMART_SPARES_VALID (1 << 1)
|
||||
@@ -111,6 +112,10 @@ struct nd_cmd_ars_err_inj_stat {
|
||||
#define ND_INTEL_SMART_NON_CRITICAL_HEALTH (1 << 0)
|
||||
#define ND_INTEL_SMART_CRITICAL_HEALTH (1 << 1)
|
||||
#define ND_INTEL_SMART_FATAL_HEALTH (1 << 2)
|
||||
#define ND_INTEL_SMART_INJECT_MTEMP (1 << 0)
|
||||
#define ND_INTEL_SMART_INJECT_SPARE (1 << 1)
|
||||
#define ND_INTEL_SMART_INJECT_FATAL (1 << 2)
|
||||
#define ND_INTEL_SMART_INJECT_SHUTDOWN (1 << 3)
|
||||
|
||||
struct nd_intel_smart {
|
||||
__u32 status;
|
||||
@@ -158,6 +163,17 @@ struct nd_intel_smart_set_threshold {
|
||||
__u32 status;
|
||||
} __packed;
|
||||
|
||||
struct nd_intel_smart_inject {
|
||||
__u64 flags;
|
||||
__u8 mtemp_enable;
|
||||
__u16 media_temperature;
|
||||
__u8 spare_enable;
|
||||
__u8 spares;
|
||||
__u8 fatal_enable;
|
||||
__u8 unsafe_shutdown_enable;
|
||||
__u32 status;
|
||||
} __packed;
|
||||
|
||||
#define INTEL_FW_STORAGE_SIZE 0x100000
|
||||
#define INTEL_FW_MAX_SEND_LEN 0xFFEC
|
||||
#define INTEL_FW_QUERY_INTERVAL 250000
|
||||
|
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