Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
This commit is contained in:
Linus Torvalds
25
arch/mips/lib-64/Makefile
Normal file
25
arch/mips/lib-64/Makefile
Normal file
@@ -0,0 +1,25 @@
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#
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# Makefile for MIPS-specific library files..
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#
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lib-y += csum_partial.o memset.o watch.o
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obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o
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obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o
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obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o
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obj-$(CONFIG_CPU_R10000) += dump_tlb.o
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obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o
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obj-$(CONFIG_CPU_R4300) += dump_tlb.o
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obj-$(CONFIG_CPU_R4X00) += dump_tlb.o
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obj-$(CONFIG_CPU_R5000) += dump_tlb.o
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obj-$(CONFIG_CPU_R5432) += dump_tlb.o
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obj-$(CONFIG_CPU_R6000) +=
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obj-$(CONFIG_CPU_R8000) +=
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obj-$(CONFIG_CPU_RM7000) += dump_tlb.o
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obj-$(CONFIG_CPU_RM9000) += dump_tlb.o
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obj-$(CONFIG_CPU_SB1) += dump_tlb.o
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obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o
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obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o
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obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o
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EXTRA_AFLAGS := $(CFLAGS)
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242
arch/mips/lib-64/csum_partial.S
Normal file
242
arch/mips/lib-64/csum_partial.S
Normal file
@@ -0,0 +1,242 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Quick'n'dirty IP checksum ...
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*
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* Copyright (C) 1998, 1999 Ralf Baechle
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* Copyright (C) 1999 Silicon Graphics, Inc.
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*/
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#include <asm/asm.h>
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#include <asm/regdef.h>
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#define ADDC(sum,reg) \
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addu sum, reg; \
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sltu v1, sum, reg; \
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addu sum, v1
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#define CSUM_BIGCHUNK(src, offset, sum, t0, t1, t2, t3) \
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lw t0, (offset + 0x00)(src); \
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lw t1, (offset + 0x04)(src); \
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lw t2, (offset + 0x08)(src); \
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lw t3, (offset + 0x0c)(src); \
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ADDC(sum, t0); \
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ADDC(sum, t1); \
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ADDC(sum, t2); \
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ADDC(sum, t3); \
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lw t0, (offset + 0x10)(src); \
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lw t1, (offset + 0x14)(src); \
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lw t2, (offset + 0x18)(src); \
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lw t3, (offset + 0x1c)(src); \
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ADDC(sum, t0); \
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ADDC(sum, t1); \
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ADDC(sum, t2); \
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ADDC(sum, t3); \
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/*
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* a0: source address
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* a1: length of the area to checksum
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* a2: partial checksum
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*/
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#define src a0
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#define sum v0
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.text
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.set noreorder
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/* unknown src alignment and < 8 bytes to go */
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small_csumcpy:
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move a1, ta2
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andi ta0, a1, 4
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beqz ta0, 1f
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andi ta0, a1, 2
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/* Still a full word to go */
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ulw ta1, (src)
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daddiu src, 4
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ADDC(sum, ta1)
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1: move ta1, zero
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beqz ta0, 1f
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andi ta0, a1, 1
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/* Still a halfword to go */
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ulhu ta1, (src)
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daddiu src, 2
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1: beqz ta0, 1f
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sll ta1, ta1, 16
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lbu ta2, (src)
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nop
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#ifdef __MIPSEB__
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sll ta2, ta2, 8
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#endif
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or ta1, ta2
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1: ADDC(sum, ta1)
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/* fold checksum */
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sll v1, sum, 16
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addu sum, v1
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sltu v1, sum, v1
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srl sum, sum, 16
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addu sum, v1
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/* odd buffer alignment? */
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beqz t3, 1f
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nop
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sll v1, sum, 8
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srl sum, sum, 8
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or sum, v1
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andi sum, 0xffff
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1:
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.set reorder
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/* Add the passed partial csum. */
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ADDC(sum, a2)
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jr ra
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.set noreorder
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/* ------------------------------------------------------------------------- */
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.align 5
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LEAF(csum_partial)
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move sum, zero
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move t3, zero
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sltiu t8, a1, 0x8
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bnez t8, small_csumcpy /* < 8 bytes to copy */
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move ta2, a1
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beqz a1, out
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andi t3, src, 0x1 /* odd buffer? */
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hword_align:
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beqz t3, word_align
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andi t8, src, 0x2
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lbu ta0, (src)
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dsubu a1, a1, 0x1
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#ifdef __MIPSEL__
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sll ta0, ta0, 8
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#endif
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ADDC(sum, ta0)
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daddu src, src, 0x1
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andi t8, src, 0x2
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word_align:
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beqz t8, dword_align
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sltiu t8, a1, 56
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lhu ta0, (src)
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dsubu a1, a1, 0x2
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ADDC(sum, ta0)
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sltiu t8, a1, 56
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daddu src, src, 0x2
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dword_align:
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bnez t8, do_end_words
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move t8, a1
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andi t8, src, 0x4
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beqz t8, qword_align
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andi t8, src, 0x8
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lw ta0, 0x00(src)
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dsubu a1, a1, 0x4
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ADDC(sum, ta0)
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daddu src, src, 0x4
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andi t8, src, 0x8
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qword_align:
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beqz t8, oword_align
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andi t8, src, 0x10
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lw ta0, 0x00(src)
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lw ta1, 0x04(src)
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dsubu a1, a1, 0x8
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ADDC(sum, ta0)
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ADDC(sum, ta1)
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daddu src, src, 0x8
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andi t8, src, 0x10
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oword_align:
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beqz t8, begin_movement
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dsrl t8, a1, 0x7
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lw ta3, 0x08(src)
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lw t0, 0x0c(src)
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lw ta0, 0x00(src)
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lw ta1, 0x04(src)
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ADDC(sum, ta3)
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ADDC(sum, t0)
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ADDC(sum, ta0)
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ADDC(sum, ta1)
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dsubu a1, a1, 0x10
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daddu src, src, 0x10
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dsrl t8, a1, 0x7
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begin_movement:
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beqz t8, 1f
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andi ta2, a1, 0x40
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move_128bytes:
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CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
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CSUM_BIGCHUNK(src, 0x20, sum, ta0, ta1, ta3, t0)
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CSUM_BIGCHUNK(src, 0x40, sum, ta0, ta1, ta3, t0)
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CSUM_BIGCHUNK(src, 0x60, sum, ta0, ta1, ta3, t0)
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dsubu t8, t8, 0x01
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bnez t8, move_128bytes
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daddu src, src, 0x80
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1:
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beqz ta2, 1f
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andi ta2, a1, 0x20
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move_64bytes:
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CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
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CSUM_BIGCHUNK(src, 0x20, sum, ta0, ta1, ta3, t0)
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daddu src, src, 0x40
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1:
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beqz ta2, do_end_words
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andi t8, a1, 0x1c
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move_32bytes:
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CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
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andi t8, a1, 0x1c
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daddu src, src, 0x20
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do_end_words:
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beqz t8, maybe_end_cruft
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dsrl t8, t8, 0x2
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end_words:
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lw ta0, (src)
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dsubu t8, t8, 0x1
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ADDC(sum, ta0)
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bnez t8, end_words
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daddu src, src, 0x4
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maybe_end_cruft:
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andi ta2, a1, 0x3
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small_memcpy:
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j small_csumcpy; move a1, ta2 /* XXX ??? */
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beqz t2, out
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move a1, ta2
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end_bytes:
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lb ta0, (src)
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dsubu a1, a1, 0x1
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bnez a2, end_bytes
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daddu src, src, 0x1
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out:
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jr ra
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move v0, sum
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END(csum_partial)
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211
arch/mips/lib-64/dump_tlb.c
Normal file
211
arch/mips/lib-64/dump_tlb.c
Normal file
@@ -0,0 +1,211 @@
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/*
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* Dump R4x00 TLB for debugging purposes.
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*
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* Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
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* Copyright (C) 1999 by Silicon Graphics, Inc.
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/string.h>
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#include <asm/bootinfo.h>
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#include <asm/cachectl.h>
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#include <asm/cpu.h>
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#include <asm/mipsregs.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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static inline const char *msk2str(unsigned int mask)
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{
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switch (mask) {
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case PM_4K: return "4kb";
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case PM_16K: return "16kb";
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case PM_64K: return "64kb";
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case PM_256K: return "256kb";
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#ifndef CONFIG_CPU_VR41XX
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case PM_1M: return "1Mb";
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case PM_4M: return "4Mb";
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case PM_16M: return "16Mb";
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case PM_64M: return "64Mb";
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case PM_256M: return "256Mb";
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#endif
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}
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return "unknown";
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}
|
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|
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#define BARRIER() \
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__asm__ __volatile__( \
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".set\tnoreorder\n\t" \
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"nop;nop;nop;nop;nop;nop;nop\n\t" \
|
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".set\treorder");
|
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|
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void dump_tlb(int first, int last)
|
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{
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unsigned long s_entryhi, entryhi, entrylo0, entrylo1, asid;
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unsigned int s_index, pagemask, c0, c1, i;
|
||||
|
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s_entryhi = read_c0_entryhi();
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s_index = read_c0_index();
|
||||
asid = s_entryhi & 0xff;
|
||||
|
||||
for (i = first; i <= last; i++) {
|
||||
write_c0_index(i);
|
||||
BARRIER();
|
||||
tlb_read();
|
||||
BARRIER();
|
||||
pagemask = read_c0_pagemask();
|
||||
entryhi = read_c0_entryhi();
|
||||
entrylo0 = read_c0_entrylo0();
|
||||
entrylo1 = read_c0_entrylo1();
|
||||
|
||||
/* Unused entries have a virtual address of CKSEG0. */
|
||||
if ((entryhi & ~0x1ffffUL) != CKSEG0
|
||||
&& (entryhi & 0xff) == asid) {
|
||||
/*
|
||||
* Only print entries in use
|
||||
*/
|
||||
printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
|
||||
|
||||
c0 = (entrylo0 >> 3) & 7;
|
||||
c1 = (entrylo1 >> 3) & 7;
|
||||
|
||||
printk("va=%011lx asid=%02lx\n",
|
||||
(entryhi & ~0x1fffUL),
|
||||
entryhi & 0xff);
|
||||
printk("\t[pa=%011lx c=%d d=%d v=%d g=%ld] ",
|
||||
(entrylo0 << 6) & PAGE_MASK, c0,
|
||||
(entrylo0 & 4) ? 1 : 0,
|
||||
(entrylo0 & 2) ? 1 : 0,
|
||||
(entrylo0 & 1));
|
||||
printk("[pa=%011lx c=%d d=%d v=%d g=%ld]\n",
|
||||
(entrylo1 << 6) & PAGE_MASK, c1,
|
||||
(entrylo1 & 4) ? 1 : 0,
|
||||
(entrylo1 & 2) ? 1 : 0,
|
||||
(entrylo1 & 1));
|
||||
}
|
||||
}
|
||||
printk("\n");
|
||||
|
||||
write_c0_entryhi(s_entryhi);
|
||||
write_c0_index(s_index);
|
||||
}
|
||||
|
||||
void dump_tlb_all(void)
|
||||
{
|
||||
dump_tlb(0, current_cpu_data.tlbsize - 1);
|
||||
}
|
||||
|
||||
void dump_tlb_wired(void)
|
||||
{
|
||||
int wired;
|
||||
|
||||
wired = read_c0_wired();
|
||||
printk("Wired: %d", wired);
|
||||
dump_tlb(0, read_c0_wired());
|
||||
}
|
||||
|
||||
void dump_tlb_addr(unsigned long addr)
|
||||
{
|
||||
unsigned int flags, oldpid;
|
||||
int index;
|
||||
|
||||
local_irq_save(flags);
|
||||
oldpid = read_c0_entryhi() & 0xff;
|
||||
BARRIER();
|
||||
write_c0_entryhi((addr & PAGE_MASK) | oldpid);
|
||||
BARRIER();
|
||||
tlb_probe();
|
||||
BARRIER();
|
||||
index = read_c0_index();
|
||||
write_c0_entryhi(oldpid);
|
||||
local_irq_restore(flags);
|
||||
|
||||
if (index < 0) {
|
||||
printk("No entry for address 0x%08lx in TLB\n", addr);
|
||||
return;
|
||||
}
|
||||
|
||||
printk("Entry %d maps address 0x%08lx\n", index, addr);
|
||||
dump_tlb(index, index);
|
||||
}
|
||||
|
||||
void dump_tlb_nonwired(void)
|
||||
{
|
||||
dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1);
|
||||
}
|
||||
|
||||
void dump_list_process(struct task_struct *t, void *address)
|
||||
{
|
||||
pgd_t *page_dir, *pgd;
|
||||
pmd_t *pmd;
|
||||
pte_t *pte, page;
|
||||
unsigned long addr, val;
|
||||
|
||||
addr = (unsigned long) address;
|
||||
|
||||
printk("Addr == %08lx\n", addr);
|
||||
printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd);
|
||||
|
||||
page_dir = pgd_offset(t->mm, 0);
|
||||
printk("page_dir == %016lx\n", (unsigned long) page_dir);
|
||||
|
||||
pgd = pgd_offset(t->mm, addr);
|
||||
printk("pgd == %016lx\n", (unsigned long) pgd);
|
||||
|
||||
pmd = pmd_offset(pgd, addr);
|
||||
printk("pmd == %016lx\n", (unsigned long) pmd);
|
||||
|
||||
pte = pte_offset(pmd, addr);
|
||||
printk("pte == %016lx\n", (unsigned long) pte);
|
||||
|
||||
page = *pte;
|
||||
printk("page == %08lx\n", pte_val(page));
|
||||
|
||||
val = pte_val(page);
|
||||
if (val & _PAGE_PRESENT) printk("present ");
|
||||
if (val & _PAGE_READ) printk("read ");
|
||||
if (val & _PAGE_WRITE) printk("write ");
|
||||
if (val & _PAGE_ACCESSED) printk("accessed ");
|
||||
if (val & _PAGE_MODIFIED) printk("modified ");
|
||||
if (val & _PAGE_R4KBUG) printk("r4kbug ");
|
||||
if (val & _PAGE_GLOBAL) printk("global ");
|
||||
if (val & _PAGE_VALID) printk("valid ");
|
||||
printk("\n");
|
||||
}
|
||||
|
||||
void dump_list_current(void *address)
|
||||
{
|
||||
dump_list_process(current, address);
|
||||
}
|
||||
|
||||
unsigned int vtop(void *address)
|
||||
{
|
||||
pgd_t *pgd;
|
||||
pmd_t *pmd;
|
||||
pte_t *pte;
|
||||
unsigned int addr, paddr;
|
||||
|
||||
addr = (unsigned long) address;
|
||||
pgd = pgd_offset(current->mm, addr);
|
||||
pmd = pmd_offset(pgd, addr);
|
||||
pte = pte_offset(pmd, addr);
|
||||
paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
|
||||
paddr |= (addr & ~PAGE_MASK);
|
||||
|
||||
return paddr;
|
||||
}
|
||||
|
||||
void dump16(unsigned long *p)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
printk("*%08lx == %08lx, ", (unsigned long)p, *p);
|
||||
p++;
|
||||
printk("*%08lx == %08lx\n", (unsigned long)p, *p);
|
||||
p++;
|
||||
}
|
||||
}
|
||||
142
arch/mips/lib-64/memset.S
Normal file
142
arch/mips/lib-64/memset.S
Normal file
@@ -0,0 +1,142 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 1998, 1999, 2000 by Ralf Baechle
|
||||
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
|
||||
*/
|
||||
#include <asm/asm.h>
|
||||
#include <asm/offset.h>
|
||||
#include <asm/regdef.h>
|
||||
|
||||
#define EX(insn,reg,addr,handler) \
|
||||
9: insn reg, addr; \
|
||||
.section __ex_table,"a"; \
|
||||
PTR 9b, handler; \
|
||||
.previous
|
||||
|
||||
.macro f_fill64 dst, offset, val, fixup
|
||||
EX(LONG_S, \val, (\offset + 0 * LONGSIZE)(\dst), \fixup)
|
||||
EX(LONG_S, \val, (\offset + 1 * LONGSIZE)(\dst), \fixup)
|
||||
EX(LONG_S, \val, (\offset + 2 * LONGSIZE)(\dst), \fixup)
|
||||
EX(LONG_S, \val, (\offset + 3 * LONGSIZE)(\dst), \fixup)
|
||||
EX(LONG_S, \val, (\offset + 4 * LONGSIZE)(\dst), \fixup)
|
||||
EX(LONG_S, \val, (\offset + 5 * LONGSIZE)(\dst), \fixup)
|
||||
EX(LONG_S, \val, (\offset + 6 * LONGSIZE)(\dst), \fixup)
|
||||
EX(LONG_S, \val, (\offset + 7 * LONGSIZE)(\dst), \fixup)
|
||||
.endm
|
||||
|
||||
/*
|
||||
* memset(void *s, int c, size_t n)
|
||||
*
|
||||
* a0: start of area to clear
|
||||
* a1: char to fill with
|
||||
* a2: size of area to clear
|
||||
*/
|
||||
.set noreorder
|
||||
.align 5
|
||||
LEAF(memset)
|
||||
beqz a1, 1f
|
||||
move v0, a0 /* result */
|
||||
|
||||
andi a1, 0xff /* spread fillword */
|
||||
dsll t1, a1, 8
|
||||
or a1, t1
|
||||
dsll t1, a1, 16
|
||||
or a1, t1
|
||||
dsll t1, a1, 32
|
||||
or a1, t1
|
||||
1:
|
||||
|
||||
FEXPORT(__bzero)
|
||||
sltiu t0, a2, LONGSIZE /* very small region? */
|
||||
bnez t0, small_memset
|
||||
andi t0, a0, LONGMASK /* aligned? */
|
||||
|
||||
beqz t0, 1f
|
||||
PTR_SUBU t0, LONGSIZE /* alignment in bytes */
|
||||
|
||||
#ifdef __MIPSEB__
|
||||
EX(sdl, a1, (a0), first_fixup) /* make dword aligned */
|
||||
#endif
|
||||
#ifdef __MIPSEL__
|
||||
EX(sdr, a1, (a0), first_fixup) /* make dword aligned */
|
||||
#endif
|
||||
PTR_SUBU a0, t0 /* long align ptr */
|
||||
PTR_ADDU a2, t0 /* correct size */
|
||||
|
||||
1: ori t1, a2, 0x3f /* # of full blocks */
|
||||
xori t1, 0x3f
|
||||
beqz t1, memset_partial /* no block to fill */
|
||||
andi t0, a2, 0x38
|
||||
|
||||
PTR_ADDU t1, a0 /* end address */
|
||||
.set reorder
|
||||
1: PTR_ADDIU a0, 64
|
||||
f_fill64 a0, -64, a1, fwd_fixup
|
||||
bne t1, a0, 1b
|
||||
.set noreorder
|
||||
|
||||
memset_partial:
|
||||
PTR_LA t1, 2f /* where to start */
|
||||
.set noat
|
||||
dsrl AT, t0, 1
|
||||
PTR_SUBU t1, AT
|
||||
.set noat
|
||||
jr t1
|
||||
PTR_ADDU a0, t0 /* dest ptr */
|
||||
|
||||
.set push
|
||||
.set noreorder
|
||||
.set nomacro
|
||||
f_fill64 a0, -64, a1, partial_fixup /* ... but first do longs ... */
|
||||
2: .set pop
|
||||
andi a2, LONGMASK /* At most one long to go */
|
||||
|
||||
beqz a2, 1f
|
||||
PTR_ADDU a0, a2 /* What's left */
|
||||
#ifdef __MIPSEB__
|
||||
EX(sdr, a1, -1(a0), last_fixup)
|
||||
#endif
|
||||
#ifdef __MIPSEL__
|
||||
EX(sdl, a1, -1(a0), last_fixup)
|
||||
#endif
|
||||
1: jr ra
|
||||
move a2, zero
|
||||
|
||||
small_memset:
|
||||
beqz a2, 2f
|
||||
PTR_ADDU t1, a0, a2
|
||||
|
||||
1: PTR_ADDIU a0, 1 /* fill bytewise */
|
||||
bne t1, a0, 1b
|
||||
sb a1, -1(a0)
|
||||
|
||||
2: jr ra /* done */
|
||||
move a2, zero
|
||||
END(memset)
|
||||
|
||||
first_fixup:
|
||||
jr ra
|
||||
nop
|
||||
|
||||
fwd_fixup:
|
||||
PTR_L t0, TI_TASK($28)
|
||||
LONG_L t0, THREAD_BUADDR(t0)
|
||||
andi a2, 0x3f
|
||||
LONG_ADDU a2, t1
|
||||
jr ra
|
||||
LONG_SUBU a2, t0
|
||||
|
||||
partial_fixup:
|
||||
PTR_L t0, TI_TASK($28)
|
||||
LONG_L t0, THREAD_BUADDR(t0)
|
||||
andi a2, LONGMASK
|
||||
LONG_ADDU a2, t1
|
||||
jr ra
|
||||
LONG_SUBU a2, t0
|
||||
|
||||
last_fixup:
|
||||
jr ra
|
||||
andi v1, a2, LONGMASK
|
||||
57
arch/mips/lib-64/watch.S
Normal file
57
arch/mips/lib-64/watch.S
Normal file
@@ -0,0 +1,57 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Kernel debug stuff to use the Watch registers.
|
||||
* Useful to find stack overflows, dangling pointers etc.
|
||||
*
|
||||
* Copyright (C) 1995, 1996, 1999, 2001 by Ralf Baechle
|
||||
*/
|
||||
#include <asm/asm.h>
|
||||
#include <asm/mipsregs.h>
|
||||
#include <asm/regdef.h>
|
||||
|
||||
.set noreorder
|
||||
/*
|
||||
* Parameter: a0 - physical address to watch
|
||||
* a1 - set bit #1 to trap on load references
|
||||
* bit #0 to trap on store references
|
||||
* Results : none
|
||||
*/
|
||||
LEAF(__watch_set)
|
||||
ori a0, 7
|
||||
xori a0, 7
|
||||
or a0, a1
|
||||
mtc0 a0, CP0_WATCHLO
|
||||
sd a0, watch_savelo
|
||||
dsrl32 a0, a0, 0
|
||||
|
||||
jr ra
|
||||
mtc0 zero, CP0_WATCHHI
|
||||
END(__watch_set)
|
||||
|
||||
/*
|
||||
* Parameter: none
|
||||
* Results : none
|
||||
*/
|
||||
LEAF(__watch_clear)
|
||||
jr ra
|
||||
mtc0 zero, CP0_WATCHLO
|
||||
END(__watch_clear)
|
||||
|
||||
/*
|
||||
* Parameter: none
|
||||
* Results : none
|
||||
*/
|
||||
LEAF(__watch_reenable)
|
||||
ld t0, watch_savelo
|
||||
jr ra
|
||||
mtc0 t0, CP0_WATCHLO
|
||||
END(__watch_reenable)
|
||||
|
||||
/*
|
||||
* Saved value of the c0_watchlo register for watch_reenable()
|
||||
*/
|
||||
.local watch_savelo
|
||||
.comm watch_savelo, 8, 8
|
||||
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