Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
This commit is contained in:
7
arch/h8300/platform/h8300h/Makefile
Normal file
7
arch/h8300/platform/h8300h/Makefile
Normal file
@@ -0,0 +1,7 @@
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#
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# Makefile for the linux kernel.
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#
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# Reuse any files we can from the H8/300H
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#
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obj-y := entry.o ints_h8300h.o ptrace_h8300h.o
|
6
arch/h8300/platform/h8300h/aki3068net/Makefile
Normal file
6
arch/h8300/platform/h8300h/aki3068net/Makefile
Normal file
@@ -0,0 +1,6 @@
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#
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# Makefile for the linux kernel.
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#
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extra-y := crt0_ram.o
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obj-y := timer.o
|
111
arch/h8300/platform/h8300h/aki3068net/crt0_ram.S
Normal file
111
arch/h8300/platform/h8300h/aki3068net/crt0_ram.S
Normal file
@@ -0,0 +1,111 @@
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/*
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* linux/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S
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*
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* Yoshinori Sato <ysato@users.sourceforge.jp>
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*
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* Platform depend startup
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* Target Archtecture: AE-3068 (aka. aki3068net)
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* Memory Layout : RAM
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*/
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#define ASSEMBLY
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#include <linux/config.h>
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#include <asm/linkage.h>
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#if !defined(CONFIG_BLKDEV_RESERVE)
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#if defined(CONFIG_GDB_DEBUG)
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#define RAMEND (__ramend - 0xc000)
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#else
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#define RAMEND __ramend
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#endif
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#else
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#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
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#endif
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.global SYMBOL_NAME(_start)
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.global SYMBOL_NAME(command_line)
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.global SYMBOL_NAME(_platform_gpio_table)
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.global SYMBOL_NAME(_target_name)
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.h8300h
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.section .text
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.file "crt0_ram.S"
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/* CPU Reset entry */
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SYMBOL_NAME_LABEL(_start)
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mov.l #RAMEND,sp
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ldc #0x80,ccr
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/* Peripheral Setup */
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#if defined(CONFIG_MTD_UCLINUX)
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/* move romfs image */
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jsr @__move_romfs
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#endif
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/* .bss clear */
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mov.l #__sbss,er5
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mov.l #__ebss,er4
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sub.l er5,er4
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shlr er4
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shlr er4
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sub.l er0,er0
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1:
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mov.l er0,@er5
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adds #4,er5
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dec.l #1,er4
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bne 1b
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/* copy kernel commandline */
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mov.l #COMMAND_START,er5
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mov.l #SYMBOL_NAME(command_line),er6
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mov.w #512,r4
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eepmov.w
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/* uClinux kernel start */
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ldc #0x90,ccr /* running kernel */
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mov.l #SYMBOL_NAME(init_thread_union),sp
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add.l #0x2000,sp
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jsr @_start_kernel
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_exit:
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jmp _exit
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rts
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/* I/O port assign information */
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__platform_gpio_table:
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mov.l #gpio_table,er0
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rts
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gpio_table:
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;; P1DDR
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.byte 0xff,0xff
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;; P2DDR
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.byte 0xff,0xff
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;; P3DDR
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.byte 0xff,0x00
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;; P4DDR
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.byte 0x00,0x00
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;; P5DDR
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.byte 0x01,0x01
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;; P6DDR
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.byte 0x00,0x00
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;; dummy
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.byte 0x00,0x00
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;; P8DDR
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.byte 0x0c,0x0c
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;; P9DDR
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.byte 0x00,0x00
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;; PADDR
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.byte 0x00,0x00
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;; PBDDR
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.byte 0x30,0x30
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__target_name:
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.asciz "AE-3068"
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.section .bootvec,"ax"
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jmp @SYMBOL_NAME(_start)
|
52
arch/h8300/platform/h8300h/aki3068net/timer.c
Normal file
52
arch/h8300/platform/h8300h/aki3068net/timer.c
Normal file
@@ -0,0 +1,52 @@
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/*
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* linux/arch/h8300/platform/h8300h/aki3068net/timer.c
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*
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* Yoshinori Sato <ysato@users.sourcefoge.jp>
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*
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* Platform depend Timer Handler
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*
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*/
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#include <linux/config.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/timex.h>
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#include <asm/segment.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/regs306x.h>
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#define CMFA 6
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#define CMIEA 0x40
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#define CCLR_CMA 0x08
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#define CLK_DIV8192 0x03
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#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
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void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
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{
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/* setup 8bit timer ch2 */
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ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */
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ctrl_outb(0x00, _8TCSR2); /* no output */
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request_irq(40, timer_int, 0, "timer", 0);
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ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */
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}
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void platform_timer_eoi(void)
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{
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*(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
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}
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void platform_gettod(int *year, int *mon, int *day, int *hour,
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int *min, int *sec)
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{
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*year = *mon = *day = *hour = *min = *sec = 0;
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}
|
333
arch/h8300/platform/h8300h/entry.S
Normal file
333
arch/h8300/platform/h8300h/entry.S
Normal file
@@ -0,0 +1,333 @@
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/* -*- mode: asm -*-
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*
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* linux/arch/h8300/platform/h8300h/entry.S
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*
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* Yoshinori Sato <ysato@users.sourceforge.jp>
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* David McCullough <davidm@snapgear.com>
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*
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*/
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/*
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* entry.S
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* include exception/interrupt gateway
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* system call entry
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*/
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#include <linux/sys.h>
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#include <linux/config.h>
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#include <asm/unistd.h>
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#include <asm/setup.h>
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#include <asm/segment.h>
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#include <asm/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/errno.h>
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.h8300h
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/* CPU context save/restore macros. */
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.macro SAVE_ALL
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mov.l er0,@-sp
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stc ccr,r0l /* check kernel mode */
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orc #0x10,ccr
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btst #4,r0l
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bne 5f
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mov.l sp,@SYMBOL_NAME(sw_usp) /* user mode */
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mov.l @sp,er0
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mov.l @SYMBOL_NAME(sw_ksp),sp
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sub.l #(LRET-LORIG),sp /* allocate LORIG - LRET */
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mov.l er0,@-sp
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mov.l er1,@-sp
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mov.l @SYMBOL_NAME(sw_usp),er0
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mov.l @(8:16,er0),er1 /* copy the RET addr */
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mov.l er1,@(LRET-LER1:16,sp)
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mov.w e1,r1 /* e1 highbyte = ccr */
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and #0xef,r1h /* mask mode? flag */
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sub.w r0,r0
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mov.b r1h,r0l
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mov.w r0,@(LCCR-LER1:16,sp) /* copy ccr */
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mov.l @(LORIG-LER1:16,sp),er0
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mov.l er0,@(LER0-LER1:16,sp) /* copy ER0 */
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bra 6f
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5:
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mov.l @sp,er0 /* kernel mode */
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subs #2,sp /* dummy ccr */
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mov.l er0,@-sp
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mov.l er1,@-sp
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mov.w @(LRET-LER1:16,sp),r1 /* copy old ccr */
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mov.b r1h,r1l
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mov.b #0,r1h
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mov.w r1,@(LCCR-LER1:16,sp) /* set ccr */
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6:
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mov.l er2,@-sp
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mov.l er3,@-sp
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mov.l er6,@-sp /* syscall arg #6 */
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mov.l er5,@-sp /* syscall arg #5 */
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mov.l er4,@-sp /* syscall arg #4 */
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.endm
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.macro RESTORE_ALL
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mov.l @sp+,er4
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mov.l @sp+,er5
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mov.l @sp+,er6
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mov.l @sp+,er3
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mov.l @sp+,er2
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mov.w @(LCCR-LER1:16,sp),r0 /* check kernel mode */
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btst #4,r0l
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bne 7f
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orc #0x80,ccr
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mov.l @SYMBOL_NAME(sw_usp),er0
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mov.l @(LER0-LER1:16,sp),er1 /* restore ER0 */
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mov.l er1,@er0
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mov.w @(LCCR-LER1:16,sp),r1 /* restore the RET addr */
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mov.b r1l,r1h
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mov.b @(LRET+1-LER1:16,sp),r1l
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mov.w r1,e1
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mov.w @(LRET+2-LER1:16,sp),r1
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mov.l er1,@(8:16,er0)
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mov.l @sp+,er1
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add.l #(LRET-LER1),sp /* remove LORIG - LRET */
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mov.l sp,@SYMBOL_NAME(sw_ksp)
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mov.l er0,sp
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bra 8f
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7:
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mov.l @sp+,er1
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adds #4,sp
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adds #2,sp
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8:
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mov.l @sp+,er0
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adds #4,sp /* remove the sw created LVEC */
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rte
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.endm
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.globl SYMBOL_NAME(system_call)
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.globl SYMBOL_NAME(ret_from_exception)
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.globl SYMBOL_NAME(ret_from_fork)
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.globl SYMBOL_NAME(ret_from_interrupt)
|
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.globl SYMBOL_NAME(interrupt_redirect_table)
|
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.globl SYMBOL_NAME(sw_ksp),SYMBOL_NAME(sw_usp)
|
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.globl SYMBOL_NAME(resume)
|
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.globl SYMBOL_NAME(interrupt_redirect_table)
|
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.globl SYMBOL_NAME(interrupt_entry)
|
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.globl SYMBOL_NAME(system_call)
|
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.globl SYMBOL_NAME(trace_break)
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|
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#if defined(CONFIG_ROMKERNEL)
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INTERRUPTS = 64
|
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.section .int_redirect,"ax"
|
||||
SYMBOL_NAME_LABEL(interrupt_redirect_table)
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.rept 7
|
||||
.long 0
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.endr
|
||||
jsr @SYMBOL_NAME(interrupt_entry) /* NMI */
|
||||
jmp @SYMBOL_NAME(system_call) /* TRAPA #0 (System call) */
|
||||
.long 0
|
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.long 0
|
||||
jmp @SYMBOL_NAME(trace_break) /* TRAPA #3 (breakpoint) */
|
||||
.rept INTERRUPTS-12
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||||
jsr @SYMBOL_NAME(interrupt_entry)
|
||||
.endr
|
||||
#endif
|
||||
#if defined(CONFIG_RAMKERNEL)
|
||||
.globl SYMBOL_NAME(interrupt_redirect_table)
|
||||
.section .bss
|
||||
SYMBOL_NAME_LABEL(interrupt_redirect_table)
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||||
.space 4
|
||||
#endif
|
||||
|
||||
.section .text
|
||||
.align 2
|
||||
SYMBOL_NAME_LABEL(interrupt_entry)
|
||||
SAVE_ALL
|
||||
mov.w @(LCCR,sp),r0
|
||||
btst #4,r0l
|
||||
bne 1f
|
||||
mov.l @SYMBOL_NAME(sw_usp),er0
|
||||
mov.l @(4:16,er0),er0
|
||||
bra 2f
|
||||
1:
|
||||
mov.l @(LVEC,sp),er0
|
||||
2:
|
||||
#if defined(CONFIG_ROMKERNEL)
|
||||
sub.l #SYMBOL_NAME(interrupt_redirect_table),er0
|
||||
#endif
|
||||
#if defined(CONFIG_RAMKERNEL)
|
||||
mov.l @SYMBOL_NAME(interrupt_redirect_table),er1
|
||||
sub.l er1,er0
|
||||
#endif
|
||||
shlr.l er0
|
||||
shlr.l er0
|
||||
dec.l #1,er0
|
||||
mov.l sp,er1
|
||||
subs #4,er1 /* adjust ret_pc */
|
||||
jsr @SYMBOL_NAME(process_int)
|
||||
mov.l @SYMBOL_NAME(irq_stat)+CPUSTAT_SOFTIRQ_PENDING,er0
|
||||
beq 1f
|
||||
jsr @SYMBOL_NAME(do_softirq)
|
||||
1:
|
||||
jmp @SYMBOL_NAME(ret_from_interrupt)
|
||||
|
||||
SYMBOL_NAME_LABEL(system_call)
|
||||
subs #4,sp /* dummy LVEC */
|
||||
SAVE_ALL
|
||||
mov.w @(LCCR:16,sp),r1
|
||||
bset #4,r1l
|
||||
ldc r1l,ccr
|
||||
mov.l er0,er4
|
||||
mov.l #-ENOSYS,er0
|
||||
mov.l er0,@(LER0:16,sp)
|
||||
|
||||
/* save top of frame */
|
||||
mov.l sp,er0
|
||||
jsr @SYMBOL_NAME(set_esp0)
|
||||
cmp.l #NR_syscalls,er4
|
||||
bcc SYMBOL_NAME(ret_from_exception):16
|
||||
shll.l er4
|
||||
shll.l er4
|
||||
mov.l #SYMBOL_NAME(sys_call_table),er0
|
||||
add.l er4,er0
|
||||
mov.l @er0,er4
|
||||
beq SYMBOL_NAME(ret_from_exception):16
|
||||
mov.l sp,er2
|
||||
and.w #0xe000,r2
|
||||
mov.b @((TASK_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
|
||||
btst #(TIF_SYSCALL_TRACE & 7),r2l
|
||||
bne 1f
|
||||
mov.l @(LER1:16,sp),er0
|
||||
mov.l @(LER2:16,sp),er1
|
||||
mov.l @(LER3:16,sp),er2
|
||||
jsr @er4
|
||||
mov.l er0,@(LER0:16,sp) /* save the return value */
|
||||
#if defined(CONFIG_SYSCALL_PRINT)
|
||||
jsr @SYMBOL_NAME(syscall_print)
|
||||
#endif
|
||||
bra SYMBOL_NAME(ret_from_exception):8
|
||||
1:
|
||||
jsr SYMBOL_NAME(syscall_trace)
|
||||
mov.l @(LER1:16,sp),er0
|
||||
mov.l @(LER2:16,sp),er1
|
||||
mov.l @(LER3:16,sp),er2
|
||||
jsr @er4
|
||||
mov.l er0,@(LER0:16,sp) /* save the return value */
|
||||
jsr @SYMBOL_NAME(syscall_trace)
|
||||
bra SYMBOL_NAME(ret_from_exception):8
|
||||
|
||||
SYMBOL_NAME_LABEL(ret_from_fork)
|
||||
mov.l er2,er0
|
||||
jsr @SYMBOL_NAME(schedule_tail)
|
||||
bra SYMBOL_NAME(ret_from_exception):8
|
||||
|
||||
SYMBOL_NAME_LABEL(reschedule)
|
||||
/* save top of frame */
|
||||
mov.l sp,er0
|
||||
jsr @SYMBOL_NAME(set_esp0)
|
||||
jsr @SYMBOL_NAME(schedule)
|
||||
|
||||
SYMBOL_NAME_LABEL(ret_from_exception)
|
||||
#if defined(CONFIG_PREEMPT)
|
||||
orc #0x80,ccr
|
||||
#endif
|
||||
SYMBOL_NAME_LABEL(ret_from_interrupt)
|
||||
mov.b @(LCCR+1:16,sp),r0l
|
||||
btst #4,r0l /* check if returning to kernel */
|
||||
bne done:8 /* if so, skip resched, signals */
|
||||
andc #0x7f,ccr
|
||||
mov.l sp,er4
|
||||
and.w #0xe000,r4
|
||||
mov.l @(TI_FLAGS:16,er4),er1
|
||||
and.l #_TIF_WORK_MASK,er1
|
||||
beq done:8
|
||||
1:
|
||||
mov.l @(TI_FLAGS:16,er4),er1
|
||||
btst #TIF_NEED_RESCHED,r1l
|
||||
bne SYMBOL_NAME(reschedule):16
|
||||
mov.l sp,er0
|
||||
subs #4,er0 /* adjust retpc */
|
||||
mov.l er2,er1
|
||||
jsr @SYMBOL_NAME(do_signal)
|
||||
#if defined(CONFIG_PREEMPT)
|
||||
bra done:8 /* userspace thoru */
|
||||
3:
|
||||
btst #4,r0l
|
||||
beq done:8 /* userspace thoru */
|
||||
4:
|
||||
mov.l @(TI_PRE_COUNT:16,er4),er1
|
||||
bne done:8
|
||||
mov.l @(TI_FLAGS:16,er4),er1
|
||||
btst #TIF_NEED_RESCHED,r1l
|
||||
beq done:8
|
||||
mov.b r0l,r0l
|
||||
bpl done:8 /* interrupt off (exception path?) */
|
||||
mov.l #PREEMPT_ACTIVE,er1
|
||||
mov.l er1,@(TI_PRE_COUNT:16,er4)
|
||||
andc #0x7f,ccr
|
||||
jsr @SYMBOL_NAME(schedule)
|
||||
sub.l er1,er1
|
||||
mov.l er1,@(TI_PRE_COUNT:16,er4)
|
||||
orc #0x80,ccr
|
||||
bra 4b:8
|
||||
#endif
|
||||
done:
|
||||
RESTORE_ALL /* Does RTE */
|
||||
|
||||
SYMBOL_NAME_LABEL(resume)
|
||||
/*
|
||||
* Beware - when entering resume, offset of tss is in d1,
|
||||
* prev (the current task) is in a0, next (the new task)
|
||||
* is in a1 and d2.b is non-zero if the mm structure is
|
||||
* shared between the tasks, so don't change these
|
||||
* registers until their contents are no longer needed.
|
||||
*/
|
||||
|
||||
/* save sr */
|
||||
sub.w r3,r3
|
||||
stc ccr,r3l
|
||||
mov.w r3,@(THREAD_CCR+2:16,er0)
|
||||
|
||||
/* disable interrupts */
|
||||
orc #0x80,ccr
|
||||
mov.l @SYMBOL_NAME(sw_usp),er3
|
||||
mov.l er3,@(THREAD_USP:16,er0)
|
||||
mov.l sp,@(THREAD_KSP:16,er0)
|
||||
|
||||
/* Skip address space switching if they are the same. */
|
||||
/* FIXME: what did we hack out of here, this does nothing! */
|
||||
|
||||
mov.l @(THREAD_USP:16,er1),er0
|
||||
mov.l er0,@SYMBOL_NAME(sw_usp)
|
||||
mov.l @(THREAD_KSP:16,er1),sp
|
||||
|
||||
/* restore status register */
|
||||
mov.w @(THREAD_CCR+2:16,er1),r3
|
||||
|
||||
ldc r3l,ccr
|
||||
rts
|
||||
|
||||
SYMBOL_NAME_LABEL(trace_break)
|
||||
subs #4,sp
|
||||
SAVE_ALL
|
||||
sub.l er1,er1
|
||||
dec.l #1,er1
|
||||
mov.l er1,@(LORIG,sp)
|
||||
mov.l sp,er0
|
||||
jsr @SYMBOL_NAME(set_esp0)
|
||||
mov.l @SYMBOL_NAME(sw_usp),er0
|
||||
mov.l @er0,er1
|
||||
subs #2,er1
|
||||
mov.l er1,@er0
|
||||
and.w #0xff,e1
|
||||
mov.l er1,er0
|
||||
jsr @SYMBOL_NAME(trace_trap)
|
||||
jmp @SYMBOL_NAME(ret_from_exception)
|
||||
|
||||
.section .bss
|
||||
SYMBOL_NAME_LABEL(sw_ksp)
|
||||
.space 4
|
||||
SYMBOL_NAME_LABEL(sw_usp)
|
||||
.space 4
|
6
arch/h8300/platform/h8300h/generic/Makefile
Normal file
6
arch/h8300/platform/h8300h/generic/Makefile
Normal file
@@ -0,0 +1,6 @@
|
||||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
obj-y := timer.o
|
||||
extra-y = crt0_$(MODEL).o
|
108
arch/h8300/platform/h8300h/generic/crt0_ram.S
Normal file
108
arch/h8300/platform/h8300h/generic/crt0_ram.S
Normal file
@@ -0,0 +1,108 @@
|
||||
/*
|
||||
* linux/arch/h8300/platform/h8300h/generic/crt0_ram.S
|
||||
*
|
||||
* Yoshinori Sato <ysato@users.sourceforge.jp>
|
||||
*
|
||||
* Platform depend startup
|
||||
* Target Archtecture: AE-3068 (aka. aki3068net)
|
||||
* Memory Layout : RAM
|
||||
*/
|
||||
|
||||
#define ASSEMBLY
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <asm/linkage.h>
|
||||
|
||||
#if !defined(CONFIG_BLKDEV_RESERVE)
|
||||
#if defined(CONFIG_GDB_DEBUG)
|
||||
#define RAMEND (__ramend - 0xc000)
|
||||
#else
|
||||
#define RAMEND __ramend
|
||||
#endif
|
||||
#else
|
||||
#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
|
||||
#endif
|
||||
|
||||
.global SYMBOL_NAME(_start)
|
||||
.global SYMBOL_NAME(command_line)
|
||||
.global SYMBOL_NAME(_platform_gpio_table)
|
||||
.global SYMBOL_NAME(_target_name)
|
||||
|
||||
.h8300h
|
||||
|
||||
.section .text
|
||||
.file "crt0_ram.S"
|
||||
|
||||
/* CPU Reset entry */
|
||||
SYMBOL_NAME_LABEL(_start)
|
||||
mov.l #RAMEND,sp
|
||||
ldc #0x80,ccr
|
||||
|
||||
/* Peripheral Setup */
|
||||
|
||||
#if defined(CONFIG_BLK_DEV_BLKMEM)
|
||||
/* move romfs image */
|
||||
jsr @__move_romfs
|
||||
#endif
|
||||
|
||||
/* .bss clear */
|
||||
mov.l #__sbss,er5
|
||||
mov.l #__ebss,er4
|
||||
sub.l er5,er4
|
||||
shlr er4
|
||||
shlr er4
|
||||
sub.l er0,er0
|
||||
1:
|
||||
mov.l er0,@er5
|
||||
adds #4,er5
|
||||
dec.l #1,er4
|
||||
bne 1b
|
||||
|
||||
/* copy kernel commandline */
|
||||
mov.l #COMMAND_START,er5
|
||||
mov.l #SYMBOL_NAME(command_line),er6
|
||||
mov.w #512,r4
|
||||
eepmov.w
|
||||
|
||||
/* uClinux kernel start */
|
||||
ldc #0x90,ccr /* running kernel */
|
||||
mov.l #SYMBOL_NAME(init_thread_union),sp
|
||||
add.l #0x2000,sp
|
||||
jsr @_start_kernel
|
||||
_exit:
|
||||
|
||||
jmp _exit
|
||||
|
||||
rts
|
||||
|
||||
/* I/O port assign information */
|
||||
__platform_gpio_table:
|
||||
mov.l #gpio_table,er0
|
||||
rts
|
||||
|
||||
gpio_table:
|
||||
;; P1DDR
|
||||
.byte 0x00,0x00
|
||||
;; P2DDR
|
||||
.byte 0x00,0x00
|
||||
;; P3DDR
|
||||
.byte 0x00,0x00
|
||||
;; P4DDR
|
||||
.byte 0x00,0x00
|
||||
;; P5DDR
|
||||
.byte 0x00,0x00
|
||||
;; P6DDR
|
||||
.byte 0x00,0x00
|
||||
;; dummy
|
||||
.byte 0x00,0x00
|
||||
;; P8DDR
|
||||
.byte 0x00,0x00
|
||||
;; P9DDR
|
||||
.byte 0x00,0x00
|
||||
;; PADDR
|
||||
.byte 0x00,0x00
|
||||
;; PBDDR
|
||||
.byte 0x00,0x00
|
||||
|
||||
__target_name:
|
||||
.asciz "generic"
|
123
arch/h8300/platform/h8300h/generic/crt0_rom.S
Normal file
123
arch/h8300/platform/h8300h/generic/crt0_rom.S
Normal file
@@ -0,0 +1,123 @@
|
||||
/*
|
||||
* linux/arch/h8300/platform/h8300h/generic/crt0_rom.S
|
||||
*
|
||||
* Yoshinori Sato <ysato@users.sourceforge.jp>
|
||||
*
|
||||
* Platform depend startup
|
||||
* Target Archtecture: generic
|
||||
* Memory Layout : ROM
|
||||
*/
|
||||
|
||||
#define ASSEMBLY
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <asm/linkage.h>
|
||||
|
||||
.global SYMBOL_NAME(_start)
|
||||
.global SYMBOL_NAME(_command_line)
|
||||
.global SYMBOL_NAME(_platform_gpio_table)
|
||||
.global SYMBOL_NAME(_target_name)
|
||||
|
||||
.h8300h
|
||||
.section .text
|
||||
.file "crt0_rom.S"
|
||||
|
||||
/* CPU Reset entry */
|
||||
SYMBOL_NAME_LABEL(_start)
|
||||
mov.l #__ramend,sp
|
||||
ldc #0x80,ccr
|
||||
|
||||
/* Peripheral Setup */
|
||||
|
||||
/* .bss clear */
|
||||
mov.l #__sbss,er5
|
||||
mov.l #__ebss,er4
|
||||
sub.l er5,er4
|
||||
shlr er4
|
||||
shlr er4
|
||||
sub.l er0,er0
|
||||
1:
|
||||
mov.l er0,@er5
|
||||
adds #4,er5
|
||||
dec.l #1,er4
|
||||
bne 1b
|
||||
|
||||
/* copy .data */
|
||||
#if !defined(CONFIG_H8300H_SIM)
|
||||
/* copy .data */
|
||||
mov.l #__begin_data,er5
|
||||
mov.l #__sdata,er6
|
||||
mov.l #__edata,er4
|
||||
sub.l er6,er4
|
||||
shlr.l er4
|
||||
shlr.l er4
|
||||
1:
|
||||
mov.l @er5+,er0
|
||||
mov.l er0,@er6
|
||||
adds #4,er6
|
||||
dec.l #1,er4
|
||||
bne 1b
|
||||
#endif
|
||||
|
||||
/* copy kernel commandline */
|
||||
mov.l #COMMAND_START,er5
|
||||
mov.l #SYMBOL_NAME(_command_line),er6
|
||||
mov.w #512,r4
|
||||
eepmov.w
|
||||
|
||||
/* linux kernel start */
|
||||
ldc #0x90,ccr /* running kernel */
|
||||
mov.l #SYMBOL_NAME(init_thread_union),sp
|
||||
add.l #0x2000,sp
|
||||
jsr @_start_kernel
|
||||
_exit:
|
||||
|
||||
jmp _exit
|
||||
|
||||
rts
|
||||
|
||||
/* I/O port assign information */
|
||||
__platform_gpio_table:
|
||||
mov.l #gpio_table,er0
|
||||
rts
|
||||
|
||||
gpio_table:
|
||||
;; P1DDR
|
||||
.byte 0x00,0x00
|
||||
;; P2DDR
|
||||
.byte 0x00,0x00
|
||||
;; P3DDR
|
||||
.byte 0x00,0x00
|
||||
;; P4DDR
|
||||
.byte 0x00,0x00
|
||||
;; P5DDR
|
||||
.byte 0x00,0x00
|
||||
;; P6DDR
|
||||
.byte 0x00,0x00
|
||||
;; dummy
|
||||
.byte 0x00,0x00
|
||||
;; P8DDR
|
||||
.byte 0x00,0x00
|
||||
;; P9DDR
|
||||
.byte 0x00,0x00
|
||||
;; PADDR
|
||||
.byte 0x00,0x00
|
||||
;; PBDDR
|
||||
.byte 0x00,0x00
|
||||
|
||||
.section .rodata
|
||||
__target_name:
|
||||
.asciz "generic"
|
||||
|
||||
.section .bss
|
||||
__command_line:
|
||||
.space 512
|
||||
|
||||
/* interrupt vector */
|
||||
.section .vectors,"ax"
|
||||
.long __start
|
||||
vector = 1
|
||||
.rept 64-1
|
||||
.long _interrupt_redirect_table+vector*4
|
||||
vector = vector + 1
|
||||
.endr
|
96
arch/h8300/platform/h8300h/generic/timer.c
Normal file
96
arch/h8300/platform/h8300h/generic/timer.c
Normal file
@@ -0,0 +1,96 @@
|
||||
/*
|
||||
* linux/arch/h8300/platform/h8300h/generic/timer.c
|
||||
*
|
||||
* Yoshinori Sato <ysato@users.sourceforge.jp>
|
||||
*
|
||||
* Platform depend Timer Handler
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/param.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include <asm/segment.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <linux/timex.h>
|
||||
|
||||
#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
|
||||
#include <asm/regs306x.h>
|
||||
#define CMFA 6
|
||||
|
||||
#define CMIEA 0x40
|
||||
#define CCLR_CMA 0x08
|
||||
#define CLK_DIV8192 0x03
|
||||
|
||||
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
|
||||
|
||||
void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
|
||||
{
|
||||
/* setup 8bit timer ch2 */
|
||||
ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */
|
||||
ctrl_outb(0x00, _8TCSR2); /* no output */
|
||||
request_irq(40, timer_int, 0, "timer", 0);
|
||||
ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */
|
||||
}
|
||||
|
||||
void platform_timer_eoi(void)
|
||||
{
|
||||
*(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_H83002) || defined(CONFIG_H83048)
|
||||
/* FIXME! */
|
||||
#define TSTR 0x00ffff60
|
||||
#define TSNC 0x00ffff61
|
||||
#define TMDR 0x00ffff62
|
||||
#define TFCR 0x00ffff63
|
||||
#define TOER 0x00ffff90
|
||||
#define TOCR 0x00ffff91
|
||||
/* ITU0 */
|
||||
#define TCR 0x00ffff64
|
||||
#define TIOR 0x00ffff65
|
||||
#define TIER 0x00ffff66
|
||||
#define TSR 0x00ffff67
|
||||
#define TCNT 0x00ffff68
|
||||
#define GRA 0x00ffff6a
|
||||
#define GRB 0x00ffff6c
|
||||
|
||||
#define CCLR_CMGRA 0x20
|
||||
#define CLK_DIV8 0x03
|
||||
|
||||
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8 /* Timer input freq. */
|
||||
|
||||
void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
|
||||
{
|
||||
*(unsigned short *)GRA= H8300_TIMER_FREQ / HZ; /* set interval */
|
||||
*(unsigned short *)TCNT=0; /* clear counter */
|
||||
ctrl_outb(0x80|CCLR_CMGRA|CLK_DIV8, TCR); /* set ITU0 clock */
|
||||
ctrl_outb(0x88, TIOR); /* no output */
|
||||
request_irq(26, timer_int, 0, "timer", 0);
|
||||
ctrl_outb(0xf9, TIER); /* compare match GRA interrupt */
|
||||
ctrl_outb(ctrl_inb(TSNC) & ~0x01, TSNC); /* ITU0 async */
|
||||
ctrl_outb(ctrl_inb(TMDR) & ~0x01, TMDR); /* ITU0 normal mode */
|
||||
ctrl_outb(ctrl_inb(TSTR) | 0x01, TSTR); /* ITU0 Start */
|
||||
return 0;
|
||||
}
|
||||
|
||||
void platform_timer_eoi(void)
|
||||
{
|
||||
ctrl_outb(ctrl_inb(TSR) & ~0x01,TSR);
|
||||
}
|
||||
#endif
|
||||
|
||||
void platform_gettod(int *year, int *mon, int *day, int *hour,
|
||||
int *min, int *sec)
|
||||
{
|
||||
*year = *mon = *day = *hour = *min = *sec = 0;
|
||||
}
|
6
arch/h8300/platform/h8300h/h8max/Makefile
Normal file
6
arch/h8300/platform/h8300h/h8max/Makefile
Normal file
@@ -0,0 +1,6 @@
|
||||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
extra-y := crt0_ram.o
|
||||
obj-y := timer.o
|
111
arch/h8300/platform/h8300h/h8max/crt0_ram.S
Normal file
111
arch/h8300/platform/h8300h/h8max/crt0_ram.S
Normal file
@@ -0,0 +1,111 @@
|
||||
/*
|
||||
* linux/arch/h8300/platform/h8300h/h8max/crt0_ram.S
|
||||
*
|
||||
* Yoshinori Sato <ysato@users.sourceforge.jp>
|
||||
*
|
||||
* Platform depend startup
|
||||
* Target Archtecture: H8MAX
|
||||
* Memory Layout : RAM
|
||||
*/
|
||||
|
||||
#define ASSEMBLY
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <asm/linkage.h>
|
||||
|
||||
#if !defined(CONFIG_BLKDEV_RESERVE)
|
||||
#if defined(CONFIG_GDB_DEBUG)
|
||||
#define RAMEND (__ramend - 0xc000)
|
||||
#else
|
||||
#define RAMEND __ramend
|
||||
#endif
|
||||
#else
|
||||
#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
|
||||
#endif
|
||||
|
||||
.global SYMBOL_NAME(_start)
|
||||
.global SYMBOL_NAME(command_line)
|
||||
.global SYMBOL_NAME(_platform_gpio_table)
|
||||
.global SYMBOL_NAME(_target_name)
|
||||
|
||||
.h8300h
|
||||
|
||||
.section .text
|
||||
.file "crt0_ram.S"
|
||||
|
||||
/* CPU Reset entry */
|
||||
SYMBOL_NAME_LABEL(_start)
|
||||
mov.l #RAMEND,sp
|
||||
ldc #0x80,ccr
|
||||
|
||||
/* Peripheral Setup */
|
||||
|
||||
#if defined(CONFIG_MTD_UCLINUX)
|
||||
/* move romfs image */
|
||||
jsr @__move_romfs
|
||||
#endif
|
||||
|
||||
/* .bss clear */
|
||||
mov.l #__sbss,er5
|
||||
mov.l #__ebss,er4
|
||||
sub.l er5,er4
|
||||
shlr er4
|
||||
shlr er4
|
||||
sub.l er0,er0
|
||||
1:
|
||||
mov.l er0,@er5
|
||||
adds #4,er5
|
||||
dec.l #1,er4
|
||||
bne 1b
|
||||
|
||||
/* copy kernel commandline */
|
||||
mov.l #COMMAND_START,er5
|
||||
mov.l #SYMBOL_NAME(command_line),er6
|
||||
mov.w #512,r4
|
||||
eepmov.w
|
||||
|
||||
/* uClinux kernel start */
|
||||
ldc #0x90,ccr /* running kernel */
|
||||
mov.l #SYMBOL_NAME(init_thread_union),sp
|
||||
add.l #0x2000,sp
|
||||
jsr @_start_kernel
|
||||
_exit:
|
||||
|
||||
jmp _exit
|
||||
|
||||
rts
|
||||
|
||||
/* I/O port assign information */
|
||||
__platform_gpio_table:
|
||||
mov.l #gpio_table,er0
|
||||
rts
|
||||
|
||||
gpio_table:
|
||||
;; P1DDR
|
||||
.byte 0xff,0xff
|
||||
;; P2DDR
|
||||
.byte 0xff,0xff
|
||||
;; P3DDR
|
||||
.byte 0x00,0x00
|
||||
;; P4DDR
|
||||
.byte 0x00,0x00
|
||||
;; P5DDR
|
||||
.byte 0x01,0x01
|
||||
;; P6DDR
|
||||
.byte 0xf6,0xf6
|
||||
;; dummy
|
||||
.byte 0x00,0x00
|
||||
;; P8DDR
|
||||
.byte 0xee,0xee
|
||||
;; P9DDR
|
||||
.byte 0x00,0x00
|
||||
;; PADDR
|
||||
.byte 0x00,0x00
|
||||
;; PBDDR
|
||||
.byte 0x30,0x30
|
||||
|
||||
__target_name:
|
||||
.asciz "H8MAX"
|
||||
|
||||
.section .bootvec,"ax"
|
||||
jmp @SYMBOL_NAME(_start)
|
53
arch/h8300/platform/h8300h/h8max/timer.c
Normal file
53
arch/h8300/platform/h8300h/h8max/timer.c
Normal file
@@ -0,0 +1,53 @@
|
||||
/*
|
||||
* linux/arch/h8300/platform/h8300h/h8max/timer.c
|
||||
*
|
||||
* Yoshinori Sato <ysato@users.sourcefoge.jp>
|
||||
*
|
||||
* Platform depend Timer Handler
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/param.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/timex.h>
|
||||
|
||||
#include <asm/segment.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/regs306x.h>
|
||||
|
||||
#define CMFA 6
|
||||
|
||||
#define CMIEA 0x40
|
||||
#define CCLR_CMA 0x08
|
||||
#define CLK_DIV8192 0x03
|
||||
|
||||
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
|
||||
|
||||
void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
|
||||
{
|
||||
/* setup 8bit timer ch2 */
|
||||
ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */
|
||||
ctrl_outb(0x00, _8TCSR2); /* no output */
|
||||
request_irq(40, timer_int, 0, "timer", 0);
|
||||
ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */
|
||||
}
|
||||
|
||||
void platform_timer_eoi(void)
|
||||
{
|
||||
*(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
|
||||
}
|
||||
|
||||
void platform_gettod(int *year, int *mon, int *day, int *hour,
|
||||
int *min, int *sec)
|
||||
{
|
||||
*year = *mon = *day = *hour = *min = *sec = 0;
|
||||
}
|
||||
|
86
arch/h8300/platform/h8300h/ints_h8300h.c
Normal file
86
arch/h8300/platform/h8300h/ints_h8300h.c
Normal file
@@ -0,0 +1,86 @@
|
||||
/*
|
||||
* linux/arch/h8300/platform/h8300h/ints_h8300h.c
|
||||
* Interrupt handling CPU variants
|
||||
*
|
||||
* Yoshinori Sato <ysato@users.sourceforge.jp>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/errno.h>
|
||||
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/traps.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <asm/regs306x.h>
|
||||
|
||||
/* saved vector list */
|
||||
const int __initdata h8300_saved_vectors[]={
|
||||
#if defined(CONFIG_GDB_DEBUG)
|
||||
TRAP3_VEC,
|
||||
#endif
|
||||
-1
|
||||
};
|
||||
|
||||
/* trap entry table */
|
||||
const unsigned long __initdata h8300_trap_table[NR_TRAPS]={
|
||||
0,0,0,0,0,0,0,0,
|
||||
(unsigned long)system_call, /* TRAPA #0 */
|
||||
0,0,
|
||||
(unsigned long)trace_break, /* TRAPA #3 */
|
||||
};
|
||||
|
||||
int h8300_enable_irq_pin(unsigned int irq)
|
||||
{
|
||||
int bitmask;
|
||||
if (irq < EXT_IRQ0 || irq > EXT_IRQ5)
|
||||
return 0;
|
||||
|
||||
/* initialize IRQ pin */
|
||||
bitmask = 1 << (irq - EXT_IRQ0);
|
||||
switch(irq) {
|
||||
case EXT_IRQ0:
|
||||
case EXT_IRQ1:
|
||||
case EXT_IRQ2:
|
||||
case EXT_IRQ3:
|
||||
if (H8300_GPIO_RESERVE(H8300_GPIO_P8, bitmask) == 0)
|
||||
return -EBUSY;
|
||||
H8300_GPIO_DDR(H8300_GPIO_P8, bitmask, H8300_GPIO_INPUT);
|
||||
break;
|
||||
case EXT_IRQ4:
|
||||
case EXT_IRQ5:
|
||||
if (H8300_GPIO_RESERVE(H8300_GPIO_P9, bitmask) == 0)
|
||||
return -EBUSY;
|
||||
H8300_GPIO_DDR(H8300_GPIO_P9, bitmask, H8300_GPIO_INPUT);
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void h8300_disable_irq_pin(unsigned int irq)
|
||||
{
|
||||
int bitmask;
|
||||
if (irq < EXT_IRQ0 || irq > EXT_IRQ5)
|
||||
return;
|
||||
|
||||
/* disable interrupt & release IRQ pin */
|
||||
bitmask = 1 << (irq - EXT_IRQ0);
|
||||
switch(irq) {
|
||||
case EXT_IRQ0:
|
||||
case EXT_IRQ1:
|
||||
case EXT_IRQ2:
|
||||
case EXT_IRQ3:
|
||||
*(volatile unsigned char *)IER &= ~bitmask;
|
||||
H8300_GPIO_FREE(H8300_GPIO_P8, bitmask);
|
||||
break ;
|
||||
case EXT_IRQ4:
|
||||
case EXT_IRQ5:
|
||||
*(volatile unsigned char *)IER &= ~bitmask;
|
||||
H8300_GPIO_FREE(H8300_GPIO_P9, bitmask);
|
||||
break;
|
||||
}
|
||||
}
|
284
arch/h8300/platform/h8300h/ptrace_h8300h.c
Normal file
284
arch/h8300/platform/h8300h/ptrace_h8300h.c
Normal file
@@ -0,0 +1,284 @@
|
||||
/*
|
||||
* linux/arch/h8300/platform/h8300h/ptrace_h8300h.c
|
||||
* ptrace cpu depend helper functions
|
||||
*
|
||||
* Yoshinori Sato <ysato@users.sourceforge.jp>
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General
|
||||
* Public License. See the file COPYING in the main directory of
|
||||
* this archive for more details.
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/sched.h>
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
#define CCR_MASK 0x6f /* mode/imask not set */
|
||||
#define BREAKINST 0x5730 /* trapa #3 */
|
||||
|
||||
/* Mapping from PT_xxx to the stack offset at which the register is
|
||||
saved. Notice that usp has no stack-slot and needs to be treated
|
||||
specially (see get_reg/put_reg below). */
|
||||
static const int h8300_register_offset[] = {
|
||||
PT_REG(er1), PT_REG(er2), PT_REG(er3), PT_REG(er4),
|
||||
PT_REG(er5), PT_REG(er6), PT_REG(er0), PT_REG(orig_er0),
|
||||
PT_REG(ccr), PT_REG(pc)
|
||||
};
|
||||
|
||||
/* read register */
|
||||
long h8300_get_reg(struct task_struct *task, int regno)
|
||||
{
|
||||
switch (regno) {
|
||||
case PT_USP:
|
||||
return task->thread.usp + sizeof(long)*2;
|
||||
case PT_CCR:
|
||||
return *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
|
||||
default:
|
||||
return *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]);
|
||||
}
|
||||
}
|
||||
|
||||
/* write register */
|
||||
int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
|
||||
{
|
||||
unsigned short oldccr;
|
||||
switch (regno) {
|
||||
case PT_USP:
|
||||
task->thread.usp = data - sizeof(long)*2;
|
||||
case PT_CCR:
|
||||
oldccr = *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
|
||||
oldccr &= ~CCR_MASK;
|
||||
data &= CCR_MASK;
|
||||
data |= oldccr;
|
||||
*(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
|
||||
break;
|
||||
default:
|
||||
*(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* disable singlestep */
|
||||
void h8300_disable_trace(struct task_struct *child)
|
||||
{
|
||||
if((long)child->thread.breakinfo.addr != -1L) {
|
||||
*child->thread.breakinfo.addr = child->thread.breakinfo.inst;
|
||||
child->thread.breakinfo.addr = (unsigned short *)-1L;
|
||||
}
|
||||
}
|
||||
|
||||
/* calculate next pc */
|
||||
enum jump_type {none, /* normal instruction */
|
||||
jabs, /* absolute address jump */
|
||||
ind, /* indirect address jump */
|
||||
ret, /* return to subrutine */
|
||||
reg, /* register indexed jump */
|
||||
relb, /* pc relative jump (byte offset) */
|
||||
relw, /* pc relative jump (word offset) */
|
||||
};
|
||||
|
||||
/* opcode decode table define
|
||||
ptn: opcode pattern
|
||||
msk: opcode bitmask
|
||||
len: instruction length (<0 next table index)
|
||||
jmp: jump operation mode */
|
||||
struct optable {
|
||||
unsigned char bitpattern;
|
||||
unsigned char bitmask;
|
||||
signed char length;
|
||||
signed char type;
|
||||
} __attribute__((aligned(1),packed));
|
||||
|
||||
#define OPTABLE(ptn,msk,len,jmp) \
|
||||
{ \
|
||||
.bitpattern = ptn, \
|
||||
.bitmask = msk, \
|
||||
.length = len, \
|
||||
.type = jmp, \
|
||||
}
|
||||
|
||||
const static struct optable optable_0[] = {
|
||||
OPTABLE(0x00,0xff, 1,none), /* 0x00 */
|
||||
OPTABLE(0x01,0xff,-1,none), /* 0x01 */
|
||||
OPTABLE(0x02,0xfe, 1,none), /* 0x02-0x03 */
|
||||
OPTABLE(0x04,0xee, 1,none), /* 0x04-0x05/0x14-0x15 */
|
||||
OPTABLE(0x06,0xfe, 1,none), /* 0x06-0x07 */
|
||||
OPTABLE(0x08,0xea, 1,none), /* 0x08-0x09/0x0c-0x0d/0x18-0x19/0x1c-0x1d */
|
||||
OPTABLE(0x0a,0xee, 1,none), /* 0x0a-0x0b/0x1a-0x1b */
|
||||
OPTABLE(0x0e,0xee, 1,none), /* 0x0e-0x0f/0x1e-0x1f */
|
||||
OPTABLE(0x10,0xfc, 1,none), /* 0x10-0x13 */
|
||||
OPTABLE(0x16,0xfe, 1,none), /* 0x16-0x17 */
|
||||
OPTABLE(0x20,0xe0, 1,none), /* 0x20-0x3f */
|
||||
OPTABLE(0x40,0xf0, 1,relb), /* 0x40-0x4f */
|
||||
OPTABLE(0x50,0xfc, 1,none), /* 0x50-0x53 */
|
||||
OPTABLE(0x54,0xfd, 1,ret ), /* 0x54/0x56 */
|
||||
OPTABLE(0x55,0xff, 1,relb), /* 0x55 */
|
||||
OPTABLE(0x57,0xff, 1,none), /* 0x57 */
|
||||
OPTABLE(0x58,0xfb, 2,relw), /* 0x58/0x5c */
|
||||
OPTABLE(0x59,0xfb, 1,reg ), /* 0x59/0x5b */
|
||||
OPTABLE(0x5a,0xfb, 2,jabs), /* 0x5a/0x5e */
|
||||
OPTABLE(0x5b,0xfb, 2,ind ), /* 0x5b/0x5f */
|
||||
OPTABLE(0x60,0xe8, 1,none), /* 0x60-0x67/0x70-0x77 */
|
||||
OPTABLE(0x68,0xfa, 1,none), /* 0x68-0x69/0x6c-0x6d */
|
||||
OPTABLE(0x6a,0xfe,-2,none), /* 0x6a-0x6b */
|
||||
OPTABLE(0x6e,0xfe, 2,none), /* 0x6e-0x6f */
|
||||
OPTABLE(0x78,0xff, 4,none), /* 0x78 */
|
||||
OPTABLE(0x79,0xff, 2,none), /* 0x79 */
|
||||
OPTABLE(0x7a,0xff, 3,none), /* 0x7a */
|
||||
OPTABLE(0x7b,0xff, 2,none), /* 0x7b */
|
||||
OPTABLE(0x7c,0xfc, 2,none), /* 0x7c-0x7f */
|
||||
OPTABLE(0x80,0x80, 1,none), /* 0x80-0xff */
|
||||
};
|
||||
|
||||
const static struct optable optable_1[] = {
|
||||
OPTABLE(0x00,0xff,-3,none), /* 0x0100 */
|
||||
OPTABLE(0x40,0xf0,-3,none), /* 0x0140-0x14f */
|
||||
OPTABLE(0x80,0xf0, 1,none), /* 0x0180-0x018f */
|
||||
OPTABLE(0xc0,0xc0, 2,none), /* 0x01c0-0x01ff */
|
||||
};
|
||||
|
||||
const static struct optable optable_2[] = {
|
||||
OPTABLE(0x00,0x20, 2,none), /* 0x6a0?/0x6a8?/0x6b0?/0x6b8? */
|
||||
OPTABLE(0x20,0x20, 3,none), /* 0x6a2?/0x6aa?/0x6b2?/0x6ba? */
|
||||
};
|
||||
|
||||
const static struct optable optable_3[] = {
|
||||
OPTABLE(0x69,0xfb, 2,none), /* 0x010069/0x01006d/014069/0x01406d */
|
||||
OPTABLE(0x6b,0xff,-4,none), /* 0x01006b/0x01406b */
|
||||
OPTABLE(0x6f,0xff, 3,none), /* 0x01006f/0x01406f */
|
||||
OPTABLE(0x78,0xff, 5,none), /* 0x010078/0x014078 */
|
||||
};
|
||||
|
||||
const static struct optable optable_4[] = {
|
||||
OPTABLE(0x00,0x78, 3,none), /* 0x0100690?/0x01006d0?/0140690/0x01406d0?/0x0100698?/0x01006d8?/0140698?/0x01406d8? */
|
||||
OPTABLE(0x20,0x78, 4,none), /* 0x0100692?/0x01006d2?/0140692/0x01406d2?/0x010069a?/0x01006da?/014069a?/0x01406da? */
|
||||
};
|
||||
|
||||
const static struct optables_list {
|
||||
const struct optable *ptr;
|
||||
int size;
|
||||
} optables[] = {
|
||||
#define OPTABLES(no) \
|
||||
{ \
|
||||
.ptr = optable_##no, \
|
||||
.size = sizeof(optable_##no) / sizeof(struct optable), \
|
||||
}
|
||||
OPTABLES(0),
|
||||
OPTABLES(1),
|
||||
OPTABLES(2),
|
||||
OPTABLES(3),
|
||||
OPTABLES(4),
|
||||
|
||||
};
|
||||
|
||||
const unsigned char condmask[] = {
|
||||
0x00,0x40,0x01,0x04,0x02,0x08,0x10,0x20
|
||||
};
|
||||
|
||||
static int isbranch(struct task_struct *task,int reson)
|
||||
{
|
||||
unsigned char cond = h8300_get_reg(task, PT_CCR);
|
||||
/* encode complex conditions */
|
||||
/* B4: N^V
|
||||
B5: Z|(N^V)
|
||||
B6: C|Z */
|
||||
__asm__("bld #3,%w0\n\t"
|
||||
"bxor #1,%w0\n\t"
|
||||
"bst #4,%w0\n\t"
|
||||
"bor #2,%w0\n\t"
|
||||
"bst #5,%w0\n\t"
|
||||
"bld #2,%w0\n\t"
|
||||
"bor #0,%w0\n\t"
|
||||
"bst #6,%w0\n\t"
|
||||
:"=&r"(cond)::"cc");
|
||||
cond &= condmask[reson >> 1];
|
||||
if (!(reson & 1))
|
||||
return cond == 0;
|
||||
else
|
||||
return cond != 0;
|
||||
}
|
||||
|
||||
static unsigned short *getnextpc(struct task_struct *child, unsigned short *pc)
|
||||
{
|
||||
const struct optable *op;
|
||||
unsigned char *fetch_p;
|
||||
unsigned char inst;
|
||||
unsigned long addr;
|
||||
unsigned long *sp;
|
||||
int op_len,regno;
|
||||
op = optables[0].ptr;
|
||||
op_len = optables[0].size;
|
||||
fetch_p = (unsigned char *)pc;
|
||||
inst = *fetch_p++;
|
||||
do {
|
||||
if ((inst & op->bitmask) == op->bitpattern) {
|
||||
if (op->length < 0) {
|
||||
op = optables[-op->length].ptr;
|
||||
op_len = optables[-op->length].size + 1;
|
||||
inst = *fetch_p++;
|
||||
} else {
|
||||
switch (op->type) {
|
||||
case none:
|
||||
return pc + op->length;
|
||||
case jabs:
|
||||
addr = *(unsigned long *)pc;
|
||||
return (unsigned short *)(addr & 0x00ffffff);
|
||||
case ind:
|
||||
addr = *pc & 0xff;
|
||||
return (unsigned short *)(*(unsigned long *)addr);
|
||||
case ret:
|
||||
sp = (unsigned long *)h8300_get_reg(child, PT_USP);
|
||||
/* user stack frames
|
||||
| er0 | temporary saved
|
||||
+--------+
|
||||
| exp | exception stack frames
|
||||
+--------+
|
||||
| ret pc | userspace return address
|
||||
*/
|
||||
return (unsigned short *)(*(sp+2) & 0x00ffffff);
|
||||
case reg:
|
||||
regno = (*pc >> 4) & 0x07;
|
||||
if (regno == 0)
|
||||
addr = h8300_get_reg(child, PT_ER0);
|
||||
else
|
||||
addr = h8300_get_reg(child, regno-1+PT_ER1);
|
||||
return (unsigned short *)addr;
|
||||
case relb:
|
||||
if ((inst = 0x55) || isbranch(child,inst & 0x0f))
|
||||
pc = (unsigned short *)((unsigned long)pc +
|
||||
((signed char)(*fetch_p)));
|
||||
return pc+1; /* skip myself */
|
||||
case relw:
|
||||
if ((inst = 0x5c) || isbranch(child,(*fetch_p & 0xf0) >> 4))
|
||||
pc = (unsigned short *)((unsigned long)pc +
|
||||
((signed short)(*(pc+1))));
|
||||
return pc+2; /* skip myself */
|
||||
}
|
||||
}
|
||||
} else
|
||||
op++;
|
||||
} while(--op_len > 0);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Set breakpoint(s) to simulate a single step from the current PC. */
|
||||
|
||||
void h8300_enable_trace(struct task_struct *child)
|
||||
{
|
||||
unsigned short *nextpc;
|
||||
nextpc = getnextpc(child,(unsigned short *)h8300_get_reg(child, PT_PC));
|
||||
child->thread.breakinfo.addr = nextpc;
|
||||
child->thread.breakinfo.inst = *nextpc;
|
||||
*nextpc = BREAKINST;
|
||||
}
|
||||
|
||||
asmlinkage void trace_trap(unsigned long bp)
|
||||
{
|
||||
if ((unsigned long)current->thread.breakinfo.addr == bp) {
|
||||
h8300_disable_trace(current);
|
||||
force_sig(SIGTRAP,current);
|
||||
} else
|
||||
force_sig(SIGILL,current);
|
||||
}
|
||||
|
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