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Linux-2.6.12-rc2

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Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
This commit is contained in:
Linus Torvalds
2005-04-16 15:20:36 -07:00
commit 1da177e4c3
17291 changed files with 6718755 additions and 0 deletions
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7
arch/h8300/platform/h8300h/Makefile Normal file
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#
# Makefile for the linux kernel.
#
# Reuse any files we can from the H8/300H
#
obj-y := entry.o ints_h8300h.o ptrace_h8300h.o

6
arch/h8300/platform/h8300h/aki3068net/Makefile Normal file
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#
# Makefile for the linux kernel.
#
extra-y := crt0_ram.o
obj-y := timer.o

111
arch/h8300/platform/h8300h/aki3068net/crt0_ram.S Normal file
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/*
* linux/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend startup
* Target Archtecture: AE-3068 (aka. aki3068net)
* Memory Layout : RAM
*/
#define ASSEMBLY
#include <linux/config.h>
#include <asm/linkage.h>
#if !defined(CONFIG_BLKDEV_RESERVE)
#if defined(CONFIG_GDB_DEBUG)
#define RAMEND (__ramend - 0xc000)
#else
#define RAMEND __ramend
#endif
#else
#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
#endif
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(command_line)
.global SYMBOL_NAME(_platform_gpio_table)
.global SYMBOL_NAME(_target_name)
.h8300h
.section .text
.file "crt0_ram.S"
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
mov.l #RAMEND,sp
ldc #0x80,ccr
/* Peripheral Setup */
#if defined(CONFIG_MTD_UCLINUX)
/* move romfs image */
jsr @__move_romfs
#endif
/* .bss clear */
mov.l #__sbss,er5
mov.l #__ebss,er4
sub.l er5,er4
shlr er4
shlr er4
sub.l er0,er0
1:
mov.l er0,@er5
adds #4,er5
dec.l #1,er4
bne 1b
/* copy kernel commandline */
mov.l #COMMAND_START,er5
mov.l #SYMBOL_NAME(command_line),er6
mov.w #512,r4
eepmov.w
/* uClinux kernel start */
ldc #0x90,ccr /* running kernel */
mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
jmp _exit
rts
/* I/O port assign information */
__platform_gpio_table:
mov.l #gpio_table,er0
rts
gpio_table:
;; P1DDR
.byte 0xff,0xff
;; P2DDR
.byte 0xff,0xff
;; P3DDR
.byte 0xff,0x00
;; P4DDR
.byte 0x00,0x00
;; P5DDR
.byte 0x01,0x01
;; P6DDR
.byte 0x00,0x00
;; dummy
.byte 0x00,0x00
;; P8DDR
.byte 0x0c,0x0c
;; P9DDR
.byte 0x00,0x00
;; PADDR
.byte 0x00,0x00
;; PBDDR
.byte 0x30,0x30
__target_name:
.asciz "AE-3068"
.section .bootvec,"ax"
jmp @SYMBOL_NAME(_start)

52
arch/h8300/platform/h8300h/aki3068net/timer.c Normal file
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/*
* linux/arch/h8300/platform/h8300h/aki3068net/timer.c
*
* Yoshinori Sato <ysato@users.sourcefoge.jp>
*
* Platform depend Timer Handler
*
*/
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/timex.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/regs306x.h>
#define CMFA 6
#define CMIEA 0x40
#define CCLR_CMA 0x08
#define CLK_DIV8192 0x03
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
{
/* setup 8bit timer ch2 */
ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */
ctrl_outb(0x00, _8TCSR2); /* no output */
request_irq(40, timer_int, 0, "timer", 0);
ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */
}
void platform_timer_eoi(void)
{
*(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
}
void platform_gettod(int *year, int *mon, int *day, int *hour,
int *min, int *sec)
{
*year = *mon = *day = *hour = *min = *sec = 0;
}

333
arch/h8300/platform/h8300h/entry.S Normal file
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/* -*- mode: asm -*-
*
* linux/arch/h8300/platform/h8300h/entry.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
* David McCullough <davidm@snapgear.com>
*
*/
/*
* entry.S
* include exception/interrupt gateway
* system call entry
*/
#include <linux/sys.h>
#include <linux/config.h>
#include <asm/unistd.h>
#include <asm/setup.h>
#include <asm/segment.h>
#include <asm/linkage.h>
#include <asm/asm-offsets.h>
#include <asm/thread_info.h>
#include <asm/errno.h>
.h8300h
/* CPU context save/restore macros. */
.macro SAVE_ALL
mov.l er0,@-sp
stc ccr,r0l /* check kernel mode */
orc #0x10,ccr
btst #4,r0l
bne 5f
mov.l sp,@SYMBOL_NAME(sw_usp) /* user mode */
mov.l @sp,er0
mov.l @SYMBOL_NAME(sw_ksp),sp
sub.l #(LRET-LORIG),sp /* allocate LORIG - LRET */
mov.l er0,@-sp
mov.l er1,@-sp
mov.l @SYMBOL_NAME(sw_usp),er0
mov.l @(8:16,er0),er1 /* copy the RET addr */
mov.l er1,@(LRET-LER1:16,sp)
mov.w e1,r1 /* e1 highbyte = ccr */
and #0xef,r1h /* mask mode? flag */
sub.w r0,r0
mov.b r1h,r0l
mov.w r0,@(LCCR-LER1:16,sp) /* copy ccr */
mov.l @(LORIG-LER1:16,sp),er0
mov.l er0,@(LER0-LER1:16,sp) /* copy ER0 */
bra 6f
5:
mov.l @sp,er0 /* kernel mode */
subs #2,sp /* dummy ccr */
mov.l er0,@-sp
mov.l er1,@-sp
mov.w @(LRET-LER1:16,sp),r1 /* copy old ccr */
mov.b r1h,r1l
mov.b #0,r1h
mov.w r1,@(LCCR-LER1:16,sp) /* set ccr */
6:
mov.l er2,@-sp
mov.l er3,@-sp
mov.l er6,@-sp /* syscall arg #6 */
mov.l er5,@-sp /* syscall arg #5 */
mov.l er4,@-sp /* syscall arg #4 */
.endm
.macro RESTORE_ALL
mov.l @sp+,er4
mov.l @sp+,er5
mov.l @sp+,er6
mov.l @sp+,er3
mov.l @sp+,er2
mov.w @(LCCR-LER1:16,sp),r0 /* check kernel mode */
btst #4,r0l
bne 7f
orc #0x80,ccr
mov.l @SYMBOL_NAME(sw_usp),er0
mov.l @(LER0-LER1:16,sp),er1 /* restore ER0 */
mov.l er1,@er0
mov.w @(LCCR-LER1:16,sp),r1 /* restore the RET addr */
mov.b r1l,r1h
mov.b @(LRET+1-LER1:16,sp),r1l
mov.w r1,e1
mov.w @(LRET+2-LER1:16,sp),r1
mov.l er1,@(8:16,er0)
mov.l @sp+,er1
add.l #(LRET-LER1),sp /* remove LORIG - LRET */
mov.l sp,@SYMBOL_NAME(sw_ksp)
mov.l er0,sp
bra 8f
7:
mov.l @sp+,er1
adds #4,sp
adds #2,sp
8:
mov.l @sp+,er0
adds #4,sp /* remove the sw created LVEC */
rte
.endm
.globl SYMBOL_NAME(system_call)
.globl SYMBOL_NAME(ret_from_exception)
.globl SYMBOL_NAME(ret_from_fork)
.globl SYMBOL_NAME(ret_from_interrupt)
.globl SYMBOL_NAME(interrupt_redirect_table)
.globl SYMBOL_NAME(sw_ksp),SYMBOL_NAME(sw_usp)
.globl SYMBOL_NAME(resume)
.globl SYMBOL_NAME(interrupt_redirect_table)
.globl SYMBOL_NAME(interrupt_entry)
.globl SYMBOL_NAME(system_call)
.globl SYMBOL_NAME(trace_break)
#if defined(CONFIG_ROMKERNEL)
INTERRUPTS = 64
.section .int_redirect,"ax"
SYMBOL_NAME_LABEL(interrupt_redirect_table)
.rept 7
.long 0
.endr
jsr @SYMBOL_NAME(interrupt_entry) /* NMI */
jmp @SYMBOL_NAME(system_call) /* TRAPA #0 (System call) */
.long 0
.long 0
jmp @SYMBOL_NAME(trace_break) /* TRAPA #3 (breakpoint) */
.rept INTERRUPTS-12
jsr @SYMBOL_NAME(interrupt_entry)
.endr
#endif
#if defined(CONFIG_RAMKERNEL)
.globl SYMBOL_NAME(interrupt_redirect_table)
.section .bss
SYMBOL_NAME_LABEL(interrupt_redirect_table)
.space 4
#endif
.section .text
.align 2
SYMBOL_NAME_LABEL(interrupt_entry)
SAVE_ALL
mov.w @(LCCR,sp),r0
btst #4,r0l
bne 1f
mov.l @SYMBOL_NAME(sw_usp),er0
mov.l @(4:16,er0),er0
bra 2f
1:
mov.l @(LVEC,sp),er0
2:
#if defined(CONFIG_ROMKERNEL)
sub.l #SYMBOL_NAME(interrupt_redirect_table),er0
#endif
#if defined(CONFIG_RAMKERNEL)
mov.l @SYMBOL_NAME(interrupt_redirect_table),er1
sub.l er1,er0
#endif
shlr.l er0
shlr.l er0
dec.l #1,er0
mov.l sp,er1
subs #4,er1 /* adjust ret_pc */
jsr @SYMBOL_NAME(process_int)
mov.l @SYMBOL_NAME(irq_stat)+CPUSTAT_SOFTIRQ_PENDING,er0
beq 1f
jsr @SYMBOL_NAME(do_softirq)
1:
jmp @SYMBOL_NAME(ret_from_interrupt)
SYMBOL_NAME_LABEL(system_call)
subs #4,sp /* dummy LVEC */
SAVE_ALL
mov.w @(LCCR:16,sp),r1
bset #4,r1l
ldc r1l,ccr
mov.l er0,er4
mov.l #-ENOSYS,er0
mov.l er0,@(LER0:16,sp)
/* save top of frame */
mov.l sp,er0
jsr @SYMBOL_NAME(set_esp0)
cmp.l #NR_syscalls,er4
bcc SYMBOL_NAME(ret_from_exception):16
shll.l er4
shll.l er4
mov.l #SYMBOL_NAME(sys_call_table),er0
add.l er4,er0
mov.l @er0,er4
beq SYMBOL_NAME(ret_from_exception):16
mov.l sp,er2
and.w #0xe000,r2
mov.b @((TASK_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
btst #(TIF_SYSCALL_TRACE & 7),r2l
bne 1f
mov.l @(LER1:16,sp),er0
mov.l @(LER2:16,sp),er1
mov.l @(LER3:16,sp),er2
jsr @er4
mov.l er0,@(LER0:16,sp) /* save the return value */
#if defined(CONFIG_SYSCALL_PRINT)
jsr @SYMBOL_NAME(syscall_print)
#endif
bra SYMBOL_NAME(ret_from_exception):8
1:
jsr SYMBOL_NAME(syscall_trace)
mov.l @(LER1:16,sp),er0
mov.l @(LER2:16,sp),er1
mov.l @(LER3:16,sp),er2
jsr @er4
mov.l er0,@(LER0:16,sp) /* save the return value */
jsr @SYMBOL_NAME(syscall_trace)
bra SYMBOL_NAME(ret_from_exception):8
SYMBOL_NAME_LABEL(ret_from_fork)
mov.l er2,er0
jsr @SYMBOL_NAME(schedule_tail)
bra SYMBOL_NAME(ret_from_exception):8
SYMBOL_NAME_LABEL(reschedule)
/* save top of frame */
mov.l sp,er0
jsr @SYMBOL_NAME(set_esp0)
jsr @SYMBOL_NAME(schedule)
SYMBOL_NAME_LABEL(ret_from_exception)
#if defined(CONFIG_PREEMPT)
orc #0x80,ccr
#endif
SYMBOL_NAME_LABEL(ret_from_interrupt)
mov.b @(LCCR+1:16,sp),r0l
btst #4,r0l /* check if returning to kernel */
bne done:8 /* if so, skip resched, signals */
andc #0x7f,ccr
mov.l sp,er4
and.w #0xe000,r4
mov.l @(TI_FLAGS:16,er4),er1
and.l #_TIF_WORK_MASK,er1
beq done:8
1:
mov.l @(TI_FLAGS:16,er4),er1
btst #TIF_NEED_RESCHED,r1l
bne SYMBOL_NAME(reschedule):16
mov.l sp,er0
subs #4,er0 /* adjust retpc */
mov.l er2,er1
jsr @SYMBOL_NAME(do_signal)
#if defined(CONFIG_PREEMPT)
bra done:8 /* userspace thoru */
3:
btst #4,r0l
beq done:8 /* userspace thoru */
4:
mov.l @(TI_PRE_COUNT:16,er4),er1
bne done:8
mov.l @(TI_FLAGS:16,er4),er1
btst #TIF_NEED_RESCHED,r1l
beq done:8
mov.b r0l,r0l
bpl done:8 /* interrupt off (exception path?) */
mov.l #PREEMPT_ACTIVE,er1
mov.l er1,@(TI_PRE_COUNT:16,er4)
andc #0x7f,ccr
jsr @SYMBOL_NAME(schedule)
sub.l er1,er1
mov.l er1,@(TI_PRE_COUNT:16,er4)
orc #0x80,ccr
bra 4b:8
#endif
done:
RESTORE_ALL /* Does RTE */
SYMBOL_NAME_LABEL(resume)
/*
* Beware - when entering resume, offset of tss is in d1,
* prev (the current task) is in a0, next (the new task)
* is in a1 and d2.b is non-zero if the mm structure is
* shared between the tasks, so don't change these
* registers until their contents are no longer needed.
*/
/* save sr */
sub.w r3,r3
stc ccr,r3l
mov.w r3,@(THREAD_CCR+2:16,er0)
/* disable interrupts */
orc #0x80,ccr
mov.l @SYMBOL_NAME(sw_usp),er3
mov.l er3,@(THREAD_USP:16,er0)
mov.l sp,@(THREAD_KSP:16,er0)
/* Skip address space switching if they are the same. */
/* FIXME: what did we hack out of here, this does nothing! */
mov.l @(THREAD_USP:16,er1),er0
mov.l er0,@SYMBOL_NAME(sw_usp)
mov.l @(THREAD_KSP:16,er1),sp
/* restore status register */
mov.w @(THREAD_CCR+2:16,er1),r3
ldc r3l,ccr
rts
SYMBOL_NAME_LABEL(trace_break)
subs #4,sp
SAVE_ALL
sub.l er1,er1
dec.l #1,er1
mov.l er1,@(LORIG,sp)
mov.l sp,er0
jsr @SYMBOL_NAME(set_esp0)
mov.l @SYMBOL_NAME(sw_usp),er0
mov.l @er0,er1
subs #2,er1
mov.l er1,@er0
and.w #0xff,e1
mov.l er1,er0
jsr @SYMBOL_NAME(trace_trap)
jmp @SYMBOL_NAME(ret_from_exception)
.section .bss
SYMBOL_NAME_LABEL(sw_ksp)
.space 4
SYMBOL_NAME_LABEL(sw_usp)
.space 4

6
arch/h8300/platform/h8300h/generic/Makefile Normal file
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#
# Makefile for the linux kernel.
#
obj-y := timer.o
extra-y = crt0_$(MODEL).o

108
arch/h8300/platform/h8300h/generic/crt0_ram.S Normal file
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/*
* linux/arch/h8300/platform/h8300h/generic/crt0_ram.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend startup
* Target Archtecture: AE-3068 (aka. aki3068net)
* Memory Layout : RAM
*/
#define ASSEMBLY
#include <linux/config.h>
#include <asm/linkage.h>
#if !defined(CONFIG_BLKDEV_RESERVE)
#if defined(CONFIG_GDB_DEBUG)
#define RAMEND (__ramend - 0xc000)
#else
#define RAMEND __ramend
#endif
#else
#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
#endif
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(command_line)
.global SYMBOL_NAME(_platform_gpio_table)
.global SYMBOL_NAME(_target_name)
.h8300h
.section .text
.file "crt0_ram.S"
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
mov.l #RAMEND,sp
ldc #0x80,ccr
/* Peripheral Setup */
#if defined(CONFIG_BLK_DEV_BLKMEM)
/* move romfs image */
jsr @__move_romfs
#endif
/* .bss clear */
mov.l #__sbss,er5
mov.l #__ebss,er4
sub.l er5,er4
shlr er4
shlr er4
sub.l er0,er0
1:
mov.l er0,@er5
adds #4,er5
dec.l #1,er4
bne 1b
/* copy kernel commandline */
mov.l #COMMAND_START,er5
mov.l #SYMBOL_NAME(command_line),er6
mov.w #512,r4
eepmov.w
/* uClinux kernel start */
ldc #0x90,ccr /* running kernel */
mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
jmp _exit
rts
/* I/O port assign information */
__platform_gpio_table:
mov.l #gpio_table,er0
rts
gpio_table:
;; P1DDR
.byte 0x00,0x00
;; P2DDR
.byte 0x00,0x00
;; P3DDR
.byte 0x00,0x00
;; P4DDR
.byte 0x00,0x00
;; P5DDR
.byte 0x00,0x00
;; P6DDR
.byte 0x00,0x00
;; dummy
.byte 0x00,0x00
;; P8DDR
.byte 0x00,0x00
;; P9DDR
.byte 0x00,0x00
;; PADDR
.byte 0x00,0x00
;; PBDDR
.byte 0x00,0x00
__target_name:
.asciz "generic"

123
arch/h8300/platform/h8300h/generic/crt0_rom.S Normal file
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/*
* linux/arch/h8300/platform/h8300h/generic/crt0_rom.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend startup
* Target Archtecture: generic
* Memory Layout : ROM
*/
#define ASSEMBLY
#include <linux/config.h>
#include <asm/linkage.h>
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(_command_line)
.global SYMBOL_NAME(_platform_gpio_table)
.global SYMBOL_NAME(_target_name)
.h8300h
.section .text
.file "crt0_rom.S"
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
mov.l #__ramend,sp
ldc #0x80,ccr
/* Peripheral Setup */
/* .bss clear */
mov.l #__sbss,er5
mov.l #__ebss,er4
sub.l er5,er4
shlr er4
shlr er4
sub.l er0,er0
1:
mov.l er0,@er5
adds #4,er5
dec.l #1,er4
bne 1b
/* copy .data */
#if !defined(CONFIG_H8300H_SIM)
/* copy .data */
mov.l #__begin_data,er5
mov.l #__sdata,er6
mov.l #__edata,er4
sub.l er6,er4
shlr.l er4
shlr.l er4
1:
mov.l @er5+,er0
mov.l er0,@er6
adds #4,er6
dec.l #1,er4
bne 1b
#endif
/* copy kernel commandline */
mov.l #COMMAND_START,er5
mov.l #SYMBOL_NAME(_command_line),er6
mov.w #512,r4
eepmov.w
/* linux kernel start */
ldc #0x90,ccr /* running kernel */
mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
jmp _exit
rts
/* I/O port assign information */
__platform_gpio_table:
mov.l #gpio_table,er0
rts
gpio_table:
;; P1DDR
.byte 0x00,0x00
;; P2DDR
.byte 0x00,0x00
;; P3DDR
.byte 0x00,0x00
;; P4DDR
.byte 0x00,0x00
;; P5DDR
.byte 0x00,0x00
;; P6DDR
.byte 0x00,0x00
;; dummy
.byte 0x00,0x00
;; P8DDR
.byte 0x00,0x00
;; P9DDR
.byte 0x00,0x00
;; PADDR
.byte 0x00,0x00
;; PBDDR
.byte 0x00,0x00
.section .rodata
__target_name:
.asciz "generic"
.section .bss
__command_line:
.space 512
/* interrupt vector */
.section .vectors,"ax"
.long __start
vector = 1
.rept 64-1
.long _interrupt_redirect_table+vector*4
vector = vector + 1
.endr

96
arch/h8300/platform/h8300h/generic/timer.c Normal file
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/*
* linux/arch/h8300/platform/h8300h/generic/timer.c
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend Timer Handler
*
*/
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <linux/timex.h>
#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
#include <asm/regs306x.h>
#define CMFA 6
#define CMIEA 0x40
#define CCLR_CMA 0x08
#define CLK_DIV8192 0x03
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
{
/* setup 8bit timer ch2 */
ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */
ctrl_outb(0x00, _8TCSR2); /* no output */
request_irq(40, timer_int, 0, "timer", 0);
ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */
}
void platform_timer_eoi(void)
{
*(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
}
#endif
#if defined(CONFIG_H83002) || defined(CONFIG_H83048)
/* FIXME! */
#define TSTR 0x00ffff60
#define TSNC 0x00ffff61
#define TMDR 0x00ffff62
#define TFCR 0x00ffff63
#define TOER 0x00ffff90
#define TOCR 0x00ffff91
/* ITU0 */
#define TCR 0x00ffff64
#define TIOR 0x00ffff65
#define TIER 0x00ffff66
#define TSR 0x00ffff67
#define TCNT 0x00ffff68
#define GRA 0x00ffff6a
#define GRB 0x00ffff6c
#define CCLR_CMGRA 0x20
#define CLK_DIV8 0x03
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8 /* Timer input freq. */
void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
{
*(unsigned short *)GRA= H8300_TIMER_FREQ / HZ; /* set interval */
*(unsigned short *)TCNT=0; /* clear counter */
ctrl_outb(0x80|CCLR_CMGRA|CLK_DIV8, TCR); /* set ITU0 clock */
ctrl_outb(0x88, TIOR); /* no output */
request_irq(26, timer_int, 0, "timer", 0);
ctrl_outb(0xf9, TIER); /* compare match GRA interrupt */
ctrl_outb(ctrl_inb(TSNC) & ~0x01, TSNC); /* ITU0 async */
ctrl_outb(ctrl_inb(TMDR) & ~0x01, TMDR); /* ITU0 normal mode */
ctrl_outb(ctrl_inb(TSTR) | 0x01, TSTR); /* ITU0 Start */
return 0;
}
void platform_timer_eoi(void)
{
ctrl_outb(ctrl_inb(TSR) & ~0x01,TSR);
}
#endif
void platform_gettod(int *year, int *mon, int *day, int *hour,
int *min, int *sec)
{
*year = *mon = *day = *hour = *min = *sec = 0;
}

6
arch/h8300/platform/h8300h/h8max/Makefile Normal file
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#
# Makefile for the linux kernel.
#
extra-y := crt0_ram.o
obj-y := timer.o

111
arch/h8300/platform/h8300h/h8max/crt0_ram.S Normal file
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/*
* linux/arch/h8300/platform/h8300h/h8max/crt0_ram.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend startup
* Target Archtecture: H8MAX
* Memory Layout : RAM
*/
#define ASSEMBLY
#include <linux/config.h>
#include <asm/linkage.h>
#if !defined(CONFIG_BLKDEV_RESERVE)
#if defined(CONFIG_GDB_DEBUG)
#define RAMEND (__ramend - 0xc000)
#else
#define RAMEND __ramend
#endif
#else
#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
#endif
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(command_line)
.global SYMBOL_NAME(_platform_gpio_table)
.global SYMBOL_NAME(_target_name)
.h8300h
.section .text
.file "crt0_ram.S"
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
mov.l #RAMEND,sp
ldc #0x80,ccr
/* Peripheral Setup */
#if defined(CONFIG_MTD_UCLINUX)
/* move romfs image */
jsr @__move_romfs
#endif
/* .bss clear */
mov.l #__sbss,er5
mov.l #__ebss,er4
sub.l er5,er4
shlr er4
shlr er4
sub.l er0,er0
1:
mov.l er0,@er5
adds #4,er5
dec.l #1,er4
bne 1b
/* copy kernel commandline */
mov.l #COMMAND_START,er5
mov.l #SYMBOL_NAME(command_line),er6
mov.w #512,r4
eepmov.w
/* uClinux kernel start */
ldc #0x90,ccr /* running kernel */
mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
jmp _exit
rts
/* I/O port assign information */
__platform_gpio_table:
mov.l #gpio_table,er0
rts
gpio_table:
;; P1DDR
.byte 0xff,0xff
;; P2DDR
.byte 0xff,0xff
;; P3DDR
.byte 0x00,0x00
;; P4DDR
.byte 0x00,0x00
;; P5DDR
.byte 0x01,0x01
;; P6DDR
.byte 0xf6,0xf6
;; dummy
.byte 0x00,0x00
;; P8DDR
.byte 0xee,0xee
;; P9DDR
.byte 0x00,0x00
;; PADDR
.byte 0x00,0x00
;; PBDDR
.byte 0x30,0x30
__target_name:
.asciz "H8MAX"
.section .bootvec,"ax"
jmp @SYMBOL_NAME(_start)

53
arch/h8300/platform/h8300h/h8max/timer.c Normal file
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/*
* linux/arch/h8300/platform/h8300h/h8max/timer.c
*
* Yoshinori Sato <ysato@users.sourcefoge.jp>
*
* Platform depend Timer Handler
*
*/
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/timex.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/regs306x.h>
#define CMFA 6
#define CMIEA 0x40
#define CCLR_CMA 0x08
#define CLK_DIV8192 0x03
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
{
/* setup 8bit timer ch2 */
ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */
ctrl_outb(0x00, _8TCSR2); /* no output */
request_irq(40, timer_int, 0, "timer", 0);
ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */
}
void platform_timer_eoi(void)
{
*(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
}
void platform_gettod(int *year, int *mon, int *day, int *hour,
int *min, int *sec)
{
*year = *mon = *day = *hour = *min = *sec = 0;
}

86
arch/h8300/platform/h8300h/ints_h8300h.c Normal file
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/*
* linux/arch/h8300/platform/h8300h/ints_h8300h.c
* Interrupt handling CPU variants
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <asm/ptrace.h>
#include <asm/traps.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/regs306x.h>
/* saved vector list */
const int __initdata h8300_saved_vectors[]={
#if defined(CONFIG_GDB_DEBUG)
TRAP3_VEC,
#endif
-1
};
/* trap entry table */
const unsigned long __initdata h8300_trap_table[NR_TRAPS]={
0,0,0,0,0,0,0,0,
(unsigned long)system_call, /* TRAPA #0 */
0,0,
(unsigned long)trace_break, /* TRAPA #3 */
};
int h8300_enable_irq_pin(unsigned int irq)
{
int bitmask;
if (irq < EXT_IRQ0 || irq > EXT_IRQ5)
return 0;
/* initialize IRQ pin */
bitmask = 1 << (irq - EXT_IRQ0);
switch(irq) {
case EXT_IRQ0:
case EXT_IRQ1:
case EXT_IRQ2:
case EXT_IRQ3:
if (H8300_GPIO_RESERVE(H8300_GPIO_P8, bitmask) == 0)
return -EBUSY;
H8300_GPIO_DDR(H8300_GPIO_P8, bitmask, H8300_GPIO_INPUT);
break;
case EXT_IRQ4:
case EXT_IRQ5:
if (H8300_GPIO_RESERVE(H8300_GPIO_P9, bitmask) == 0)
return -EBUSY;
H8300_GPIO_DDR(H8300_GPIO_P9, bitmask, H8300_GPIO_INPUT);
break;
}
return 0;
}
void h8300_disable_irq_pin(unsigned int irq)
{
int bitmask;
if (irq < EXT_IRQ0 || irq > EXT_IRQ5)
return;
/* disable interrupt & release IRQ pin */
bitmask = 1 << (irq - EXT_IRQ0);
switch(irq) {
case EXT_IRQ0:
case EXT_IRQ1:
case EXT_IRQ2:
case EXT_IRQ3:
*(volatile unsigned char *)IER &= ~bitmask;
H8300_GPIO_FREE(H8300_GPIO_P8, bitmask);
break ;
case EXT_IRQ4:
case EXT_IRQ5:
*(volatile unsigned char *)IER &= ~bitmask;
H8300_GPIO_FREE(H8300_GPIO_P9, bitmask);
break;
}
}

284
arch/h8300/platform/h8300h/ptrace_h8300h.c Normal file
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/*
* linux/arch/h8300/platform/h8300h/ptrace_h8300h.c
* ptrace cpu depend helper functions
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of
* this archive for more details.
*/
#include <linux/linkage.h>
#include <linux/sched.h>
#include <asm/ptrace.h>
#define CCR_MASK 0x6f /* mode/imask not set */
#define BREAKINST 0x5730 /* trapa #3 */
/* Mapping from PT_xxx to the stack offset at which the register is
saved. Notice that usp has no stack-slot and needs to be treated
specially (see get_reg/put_reg below). */
static const int h8300_register_offset[] = {
PT_REG(er1), PT_REG(er2), PT_REG(er3), PT_REG(er4),
PT_REG(er5), PT_REG(er6), PT_REG(er0), PT_REG(orig_er0),
PT_REG(ccr), PT_REG(pc)
};
/* read register */
long h8300_get_reg(struct task_struct *task, int regno)
{
switch (regno) {
case PT_USP:
return task->thread.usp + sizeof(long)*2;
case PT_CCR:
return *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
default:
return *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]);
}
}
/* write register */
int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
{
unsigned short oldccr;
switch (regno) {
case PT_USP:
task->thread.usp = data - sizeof(long)*2;
case PT_CCR:
oldccr = *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
oldccr &= ~CCR_MASK;
data &= CCR_MASK;
data |= oldccr;
*(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
break;
default:
*(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
break;
}
return 0;
}
/* disable singlestep */
void h8300_disable_trace(struct task_struct *child)
{
if((long)child->thread.breakinfo.addr != -1L) {
*child->thread.breakinfo.addr = child->thread.breakinfo.inst;
child->thread.breakinfo.addr = (unsigned short *)-1L;
}
}
/* calculate next pc */
enum jump_type {none, /* normal instruction */
jabs, /* absolute address jump */
ind, /* indirect address jump */
ret, /* return to subrutine */
reg, /* register indexed jump */
relb, /* pc relative jump (byte offset) */
relw, /* pc relative jump (word offset) */
};
/* opcode decode table define
ptn: opcode pattern
msk: opcode bitmask
len: instruction length (<0 next table index)
jmp: jump operation mode */
struct optable {
unsigned char bitpattern;
unsigned char bitmask;
signed char length;
signed char type;
} __attribute__((aligned(1),packed));
#define OPTABLE(ptn,msk,len,jmp) \
{ \
.bitpattern = ptn, \
.bitmask = msk, \
.length = len, \
.type = jmp, \
}
const static struct optable optable_0[] = {
OPTABLE(0x00,0xff, 1,none), /* 0x00 */
OPTABLE(0x01,0xff,-1,none), /* 0x01 */
OPTABLE(0x02,0xfe, 1,none), /* 0x02-0x03 */
OPTABLE(0x04,0xee, 1,none), /* 0x04-0x05/0x14-0x15 */
OPTABLE(0x06,0xfe, 1,none), /* 0x06-0x07 */
OPTABLE(0x08,0xea, 1,none), /* 0x08-0x09/0x0c-0x0d/0x18-0x19/0x1c-0x1d */
OPTABLE(0x0a,0xee, 1,none), /* 0x0a-0x0b/0x1a-0x1b */
OPTABLE(0x0e,0xee, 1,none), /* 0x0e-0x0f/0x1e-0x1f */
OPTABLE(0x10,0xfc, 1,none), /* 0x10-0x13 */
OPTABLE(0x16,0xfe, 1,none), /* 0x16-0x17 */
OPTABLE(0x20,0xe0, 1,none), /* 0x20-0x3f */
OPTABLE(0x40,0xf0, 1,relb), /* 0x40-0x4f */
OPTABLE(0x50,0xfc, 1,none), /* 0x50-0x53 */
OPTABLE(0x54,0xfd, 1,ret ), /* 0x54/0x56 */
OPTABLE(0x55,0xff, 1,relb), /* 0x55 */
OPTABLE(0x57,0xff, 1,none), /* 0x57 */
OPTABLE(0x58,0xfb, 2,relw), /* 0x58/0x5c */
OPTABLE(0x59,0xfb, 1,reg ), /* 0x59/0x5b */
OPTABLE(0x5a,0xfb, 2,jabs), /* 0x5a/0x5e */
OPTABLE(0x5b,0xfb, 2,ind ), /* 0x5b/0x5f */
OPTABLE(0x60,0xe8, 1,none), /* 0x60-0x67/0x70-0x77 */
OPTABLE(0x68,0xfa, 1,none), /* 0x68-0x69/0x6c-0x6d */
OPTABLE(0x6a,0xfe,-2,none), /* 0x6a-0x6b */
OPTABLE(0x6e,0xfe, 2,none), /* 0x6e-0x6f */
OPTABLE(0x78,0xff, 4,none), /* 0x78 */
OPTABLE(0x79,0xff, 2,none), /* 0x79 */
OPTABLE(0x7a,0xff, 3,none), /* 0x7a */
OPTABLE(0x7b,0xff, 2,none), /* 0x7b */
OPTABLE(0x7c,0xfc, 2,none), /* 0x7c-0x7f */
OPTABLE(0x80,0x80, 1,none), /* 0x80-0xff */
};
const static struct optable optable_1[] = {
OPTABLE(0x00,0xff,-3,none), /* 0x0100 */
OPTABLE(0x40,0xf0,-3,none), /* 0x0140-0x14f */
OPTABLE(0x80,0xf0, 1,none), /* 0x0180-0x018f */
OPTABLE(0xc0,0xc0, 2,none), /* 0x01c0-0x01ff */
};
const static struct optable optable_2[] = {
OPTABLE(0x00,0x20, 2,none), /* 0x6a0?/0x6a8?/0x6b0?/0x6b8? */
OPTABLE(0x20,0x20, 3,none), /* 0x6a2?/0x6aa?/0x6b2?/0x6ba? */
};
const static struct optable optable_3[] = {
OPTABLE(0x69,0xfb, 2,none), /* 0x010069/0x01006d/014069/0x01406d */
OPTABLE(0x6b,0xff,-4,none), /* 0x01006b/0x01406b */
OPTABLE(0x6f,0xff, 3,none), /* 0x01006f/0x01406f */
OPTABLE(0x78,0xff, 5,none), /* 0x010078/0x014078 */
};
const static struct optable optable_4[] = {
OPTABLE(0x00,0x78, 3,none), /* 0x0100690?/0x01006d0?/0140690/0x01406d0?/0x0100698?/0x01006d8?/0140698?/0x01406d8? */
OPTABLE(0x20,0x78, 4,none), /* 0x0100692?/0x01006d2?/0140692/0x01406d2?/0x010069a?/0x01006da?/014069a?/0x01406da? */
};
const static struct optables_list {
const struct optable *ptr;
int size;
} optables[] = {
#define OPTABLES(no) \
{ \
.ptr = optable_##no, \
.size = sizeof(optable_##no) / sizeof(struct optable), \
}
OPTABLES(0),
OPTABLES(1),
OPTABLES(2),
OPTABLES(3),
OPTABLES(4),
};
const unsigned char condmask[] = {
0x00,0x40,0x01,0x04,0x02,0x08,0x10,0x20
};
static int isbranch(struct task_struct *task,int reson)
{
unsigned char cond = h8300_get_reg(task, PT_CCR);
/* encode complex conditions */
/* B4: N^V
B5: Z|(N^V)
B6: C|Z */
__asm__("bld #3,%w0\n\t"
"bxor #1,%w0\n\t"
"bst #4,%w0\n\t"
"bor #2,%w0\n\t"
"bst #5,%w0\n\t"
"bld #2,%w0\n\t"
"bor #0,%w0\n\t"
"bst #6,%w0\n\t"
:"=&r"(cond)::"cc");
cond &= condmask[reson >> 1];
if (!(reson & 1))
return cond == 0;
else
return cond != 0;
}
static unsigned short *getnextpc(struct task_struct *child, unsigned short *pc)
{
const struct optable *op;
unsigned char *fetch_p;
unsigned char inst;
unsigned long addr;
unsigned long *sp;
int op_len,regno;
op = optables[0].ptr;
op_len = optables[0].size;
fetch_p = (unsigned char *)pc;
inst = *fetch_p++;
do {
if ((inst & op->bitmask) == op->bitpattern) {
if (op->length < 0) {
op = optables[-op->length].ptr;
op_len = optables[-op->length].size + 1;
inst = *fetch_p++;
} else {
switch (op->type) {
case none:
return pc + op->length;
case jabs:
addr = *(unsigned long *)pc;
return (unsigned short *)(addr & 0x00ffffff);
case ind:
addr = *pc & 0xff;
return (unsigned short *)(*(unsigned long *)addr);
case ret:
sp = (unsigned long *)h8300_get_reg(child, PT_USP);
/* user stack frames
| er0 | temporary saved
+--------+
| exp | exception stack frames
+--------+
| ret pc | userspace return address
*/
return (unsigned short *)(*(sp+2) & 0x00ffffff);
case reg:
regno = (*pc >> 4) & 0x07;
if (regno == 0)
addr = h8300_get_reg(child, PT_ER0);
else
addr = h8300_get_reg(child, regno-1+PT_ER1);
return (unsigned short *)addr;
case relb:
if ((inst = 0x55) || isbranch(child,inst & 0x0f))
pc = (unsigned short *)((unsigned long)pc +
((signed char)(*fetch_p)));
return pc+1; /* skip myself */
case relw:
if ((inst = 0x5c) || isbranch(child,(*fetch_p & 0xf0) >> 4))
pc = (unsigned short *)((unsigned long)pc +
((signed short)(*(pc+1))));
return pc+2; /* skip myself */
}
}
} else
op++;
} while(--op_len > 0);
return NULL;
}
/* Set breakpoint(s) to simulate a single step from the current PC. */
void h8300_enable_trace(struct task_struct *child)
{
unsigned short *nextpc;
nextpc = getnextpc(child,(unsigned short *)h8300_get_reg(child, PT_PC));
child->thread.breakinfo.addr = nextpc;
child->thread.breakinfo.inst = *nextpc;
*nextpc = BREAKINST;
}
asmlinkage void trace_trap(unsigned long bp)
{
if ((unsigned long)current->thread.breakinfo.addr == bp) {
h8300_disable_trace(current);
force_sig(SIGTRAP,current);
} else
force_sig(SIGILL,current);
}

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arch/h8300/platform/h8s/Makefile Normal file
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#
# Makefile for the linux kernel.
#
# Reuse any files we can from the H8S
#
obj-y := entry.o ints_h8s.o ptrace_h8s.o

6
arch/h8300/platform/h8s/edosk2674/Makefile Normal file
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#
# Makefile for the linux kernel.
#
extra-y := crt0_$(MODEL).o
obj-y := timer.o

131
arch/h8300/platform/h8s/edosk2674/crt0_ram.S Normal file
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/*
* linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend startup
* Target Archtecture: EDOSK-2674
* Memory Layout : RAM
*/
#define ASSEMBLY
#include <linux/config.h>
#include <asm/linkage.h>
#include <asm/regs267x.h>
#if !defined(CONFIG_BLKDEV_RESERVE)
#if defined(CONFIG_GDB_DEBUG)
#define RAMEND (__ramend - 0xc000)
#else
#define RAMEND __ramend
#endif
#else
#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
#endif
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(_command_line)
.global SYMBOL_NAME(_platform_gpio_table)
.global SYMBOL_NAME(_target_name)
.h8300s
.section .text
.file "crt0_ram.S"
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
mov.l #RAMEND,sp
ldc #0x80,ccr
ldc #0x00,exr
/* Peripheral Setup */
bclr #4,@INTCR:8 /* interrupt mode 2 */
bset #5,@INTCR:8
bclr #0,@IER+1:16
bset #1,@ISCRL+1:16 /* IRQ0 Positive Edge */
bclr #0,@ISCRL+1:16
#if defined(CONFIG_MTD_UCLINUX)
/* move romfs image */
jsr @__move_romfs
#endif
/* .bss clear */
mov.l #__sbss,er5
mov.l er5,er6
mov.l #__ebss,er4
sub.l er5,er4
shlr #2,er4
sub.l er0,er0
1:
mov.l er0,@er5
adds #4,er5
dec.l #1,er4
bne 1b
/* copy kernel commandline */
mov.l #COMMAND_START,er5
mov.l #SYMBOL_NAME(command_line),er6
mov.w #512,r4
eepmov.w
/* uClinux kernel start */
ldc #0x90,ccr /* running kernel */
mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
jmp _exit
rts
/* I/O port assign information */
__platform_gpio_table:
mov.l #gpio_table,er0
rts
gpio_table:
;; P1DDR
;; used,ddr
.byte 0x00,0x00
;; P2DDR
.byte 0x00,0x00
;; P3DDR
.byte 0x3f,0x3a
;; dummy
.byte 0x00,0x00
;; P5DDR
.byte 0x00,0x00
;; P6DDR
.byte 0x00,0x00
;; P7DDR
.byte 0x00,0x00
;; P8DDR
.byte 0x00,0x00
;; dummy
.byte 0x00,0x00
;; PADDR
.byte 0xff,0xff
;; PBDDR
.byte 0xff,0x00
;; PCDDR
.byte 0xff,0x00
;; PDDDR
.byte 0xff,0x00
;; PEDDR
.byte 0xff,0x00
;; PFDDR
.byte 0xff,0xff
;; PGDDR
.byte 0x0f,0x0f
;; PHDDR
.byte 0x0f,0x0f
__target_name:
.asciz "EDOSK-2674"
.section .bootvec,"ax"
jmp @SYMBOL_NAME(_start)

187
arch/h8300/platform/h8s/edosk2674/crt0_rom.S Normal file
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@@ -0,0 +1,187 @@
/*
* linux/arch/h8300/platform/h8s/edosk2674/crt0_rom.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend startup
* Target Archtecture: EDOSK-2674
* Memory Layout : ROM
*/
#define ASSEMBLY
#include <linux/config.h>
#include <asm/linkage.h>
#include <asm/regs267x.h>
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(_command_line)
.global SYMBOL_NAME(_platform_gpio_table)
.global SYMBOL_NAME(_target_name)
.h8300s
.section .text
.file "crt0_rom.S"
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
mov.l #__ramend,sp
ldc #0x80,ccr
ldc #0,exr
/* Peripheral Setup */
;BSC/GPIO setup
mov.l #init_regs,er0
mov.w #0xffff,e2
1:
mov.w @er0+,r2
beq 2f
mov.w @er0+,r1
mov.b r1l,@er2
bra 1b
2:
;SDRAM setup
#define SDRAM_SMR 0x400040
mov.b #0,r0l
mov.b r0l,@DRACCR:16
mov.w #0x188,r0
mov.w r0,@REFCR:16
mov.w #0x85b4,r0
mov.w r0,@DRAMCR:16
mov.b #0,r1l
mov.b r1l,@SDRAM_SMR
mov.w #0x84b4,r0
mov.w r0,@DRAMCR:16
;special thanks to Arizona Cooperative Power
/* copy .data */
mov.l #__begin_data,er5
mov.l #__sdata,er6
mov.l #__edata,er4
sub.l er6,er4
shlr.l #2,er4
1:
mov.l @er5+,er0
mov.l er0,@er6
adds #4,er6
dec.l #1,er4
bne 1b
/* .bss clear */
mov.l #__sbss,er5
mov.l #__ebss,er4
sub.l er5,er4
shlr.l #2,er4
sub.l er0,er0
1:
mov.l er0,@er5
adds #4,er5
dec.l #1,er4
bne 1b
/* copy kernel commandline */
mov.l #COMMAND_START,er5
mov.l #SYMBOL_NAME(_command_line),er6
mov.w #512,r4
eepmov.w
/* linux kernel start */
ldc #0x90,ccr /* running kernel */
mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
jmp _exit
rts
/* I/O port assign information */
__platform_gpio_table:
mov.l #gpio_table,er0
rts
#define INIT_REGS_DATA(REGS,DATA) \
.word ((REGS) & 0xffff),DATA
init_regs:
INIT_REGS_DATA(ASTCR,0xff)
INIT_REGS_DATA(RDNCR,0x00)
INIT_REGS_DATA(ABWCR,0x80)
INIT_REGS_DATA(WTCRAH,0x27)
INIT_REGS_DATA(WTCRAL,0x77)
INIT_REGS_DATA(WTCRBH,0x71)
INIT_REGS_DATA(WTCRBL,0x22)
INIT_REGS_DATA(CSACRH,0x80)
INIT_REGS_DATA(CSACRL,0x80)
INIT_REGS_DATA(BROMCRH,0xa0)
INIT_REGS_DATA(BROMCRL,0xa0)
INIT_REGS_DATA(P3DDR,0x3a)
INIT_REGS_DATA(P3ODR,0x06)
INIT_REGS_DATA(PADDR,0xff)
INIT_REGS_DATA(PFDDR,0xfe)
INIT_REGS_DATA(PGDDR,0x0f)
INIT_REGS_DATA(PHDDR,0x0f)
INIT_REGS_DATA(PFCR0,0xff)
INIT_REGS_DATA(PFCR2,0x0d)
INIT_REGS_DATA(ITSR, 0x00)
INIT_REGS_DATA(ITSR+1,0x3f)
INIT_REGS_DATA(INTCR,0x20)
.word 0
gpio_table:
;; P1DDR
.byte 0x00,0x00
;; P2DDR
.byte 0x00,0x00
;; P3DDR
.byte 0x00,0x00
;; dummy
.byte 0x00,0x00
;; P5DDR
.byte 0x00,0x00
;; P6DDR
.byte 0x00,0x00
;; P7DDR
.byte 0x00,0x00
;; P8DDR
.byte 0x00,0x00
;; dummy
.byte 0x00,0x00
;; PADDR
.byte 0x00,0x00
;; PBDDR
.byte 0x00,0x00
;; PCDDR
.byte 0x00,0x00
;; PDDDR
.byte 0x00,0x00
;; PEDDR
.byte 0x00,0x00
;; PFDDR
.byte 0x00,0x00
;; PGDDR
.byte 0x00,0x00
;; PHDDR
.byte 0x00,0x00
.section .rodata
__target_name:
.asciz "EDOSK-2674"
.section .bss
__command_line:
.space 512
/* interrupt vector */
.section .vectors,"ax"
.long __start
.long __start
vector = 2
.rept 126
.long _interrupt_redirect_table+vector*4
vector = vector + 1
.endr

55
arch/h8300/platform/h8s/edosk2674/timer.c Normal file
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/*
* linux/arch/h8300/platform/h8s/edosk2674/timer.c
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend Timer Handler
*
*/
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/timex.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/regs267x.h>
#define CMFA 6
#define CMIEA 0x40
#define CCLR_CMA 0x08
#define CLK_DIV8192 0x03
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
{
/* 8bit timer module enabled */
ctrl_outb(ctrl_inb(MSTPCRL) & ~0x01, MSTPCRL);
/* setup 8bit timer ch1 */
ctrl_outb(H8300_TIMER_FREQ / HZ, _8TCORA1); /* set interval */
ctrl_outb(0x00, _8TCSR1); /* no output */
request_irq(76, timer_int, 0, "timer" ,0);
ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR1); /* start count */
}
void platform_timer_eoi(void)
{
*(volatile unsigned char *)_8TCSR1 &= ~(1 << CMFA);
}
void platform_gettod(int *year, int *mon, int *day, int *hour,
int *min, int *sec)
{
/* FIXME! not RTC support */
*year = *mon = *day = *hour = *min = *sec = 0;
}

331
arch/h8300/platform/h8s/entry.S Normal file
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/* -*- mode: asm -*-
*
* linux/arch/h8300/platform/h8s/entry.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* fairly heavy changes to fix syscall args and signal processing
* by David McCullough <davidm@snapgear.com>
*/
/*
* entry.S
* include exception/interrupt gateway
* system call entry
*/
#include <linux/sys.h>
#include <linux/config.h>
#include <asm/unistd.h>
#include <asm/setup.h>
#include <asm/segment.h>
#include <asm/linkage.h>
#include <asm/asm-offsets.h>
#include <asm/thread_info.h>
#include <asm/errno.h>
.h8300s
/* CPU context save/restore macros. */
.macro SAVE_ALL
mov.l er0,@-sp
stc ccr,r0l /* check kernel mode */
orc #0x10,ccr
btst #4,r0l
bne 5f
mov.l sp,@SYMBOL_NAME(sw_usp) /* user mode */
mov.l @sp,er0
mov.l @SYMBOL_NAME(sw_ksp),sp
sub.l #(LRET-LORIG),sp /* allocate LORIG - LRET */
stm.l er0-er3,@-sp
mov.l @SYMBOL_NAME(sw_usp),er0
mov.l @(10:16,er0),er1 /* copy the RET addr */
mov.l er1,@(LRET-LER3:16,sp)
mov.w @(8:16,er0),r1
mov.w r1,@(LEXR-LER3:16,sp) /* copy EXR */
mov.w e1,r1 /* e1 highbyte = ccr */
and #0xef,r1h /* mask mode? flag */
sub.w r0,r0
mov.b r1h,r0l
mov.w r0,@(LCCR-LER3:16,sp) /* copy ccr */
mov.l @(LORIG-LER3:16,sp),er0
mov.l er0,@(LER0-LER3:16,sp) /* copy ER0 */
bra 6f
5:
mov.l @sp,er0 /* kernel mode */
subs #2,sp /* dummy ccr */
stm.l er0-er3,@-sp
mov.w @(LRET-LER3:16,sp),r1 /* copy old ccr */
mov.b r1h,r1l
mov.b #0,r1h
mov.w r1,@(LCCR-LER3:16,sp)
6:
mov.l er6,@-sp /* syscall arg #6 */
mov.l er5,@-sp /* syscall arg #5 */
mov.l er4,@-sp /* syscall arg #4 */
.endm
.macro RESTORE_ALL
mov.l @sp+,er4
mov.l @sp+,er5
mov.l @sp+,er6
ldm.l @sp+,er2-er3
mov.w @(LCCR-LER1:16,sp),r0 /* check kernel mode */
btst #4,r0l
bne 7f
orc #0x80,ccr
mov.l @SYMBOL_NAME(sw_usp),er0
mov.l @(LER0-LER1:16,sp),er1 /* restore ER0 */
mov.l er1,@er0
mov.w @(LEXR-LER1:16,sp),r1 /* restore EXR */
mov.b r1l,r1h
mov.w r1,@(8:16,er0)
mov.w @(LCCR-LER1:16,sp),r1 /* restore the RET addr */
mov.b r1l,r1h
mov.b @(LRET+1-LER1:16,sp),r1l
mov.w r1,e1
mov.w @(LRET+2-LER1:16,sp),r1
mov.l er1,@(10:16,er0)
mov.l @sp+,er1
add.l #(LRET-LER1),sp /* remove LORIG - LRET */
mov.l sp,@SYMBOL_NAME(sw_ksp)
mov.l er0,sp
bra 8f
7:
mov.l @sp+,er1
adds #4,sp
adds #2,sp
8:
mov.l @sp+,er0
adds #4,sp /* remove the sw created LVEC */
rte
.endm
.globl SYMBOL_NAME(system_call)
.globl SYMBOL_NAME(ret_from_exception)
.globl SYMBOL_NAME(ret_from_fork)
.globl SYMBOL_NAME(ret_from_interrupt)
.globl SYMBOL_NAME(interrupt_redirect_table)
.globl SYMBOL_NAME(sw_ksp),SYMBOL_NAME(sw_usp)
.globl SYMBOL_NAME(resume)
.globl SYMBOL_NAME(trace_break)
.globl SYMBOL_NAME(interrupt_entry)
INTERRUPTS = 128
#if defined(CONFIG_ROMKERNEL)
.section .int_redirect,"ax"
SYMBOL_NAME_LABEL(interrupt_redirect_table)
.rept 7
.long 0
.endr
jsr @SYMBOL_NAME(interrupt_entry) /* NMI */
jmp @SYMBOL_NAME(system_call) /* TRAPA #0 (System call) */
.long 0
.long 0
jmp @SYMBOL_NAME(trace_break) /* TRAPA #3 (breakpoint) */
.rept INTERRUPTS-12
jsr @SYMBOL_NAME(interrupt_entry)
.endr
#endif
#if defined(CONFIG_RAMKERNEL)
.globl SYMBOL_NAME(interrupt_redirect_table)
.section .bss
SYMBOL_NAME_LABEL(interrupt_redirect_table)
.space 4
#endif
.section .text
.align 2
SYMBOL_NAME_LABEL(interrupt_entry)
SAVE_ALL
mov.w @(LCCR,sp),r0
btst #4,r0l
bne 1f
mov.l @SYMBOL_NAME(sw_usp),er0
mov.l @(4:16,er0),er0
bra 2f
1:
mov.l @(LVEC:16,sp),er0
2:
#if defined(CONFIG_ROMKERNEL)
sub.l #SYMBOL_NAME(interrupt_redirect_table),er0
#endif
#if defined(CONFIG_RAMKERNEL)
mov.l @SYMBOL_NAME(interrupt_redirect_table),er1
sub.l er1,er0
#endif
shlr.l #2,er0
dec.l #1,er0
mov.l sp,er1
subs #4,er1 /* adjust ret_pc */
jsr @SYMBOL_NAME(process_int)
mov.l @SYMBOL_NAME(irq_stat)+CPUSTAT_SOFTIRQ_PENDING,er0
beq 1f
jsr @SYMBOL_NAME(do_softirq)
1:
jmp @SYMBOL_NAME(ret_from_exception)
SYMBOL_NAME_LABEL(system_call)
subs #4,sp /* dummy LVEC */
SAVE_ALL
mov.w @(LCCR:16,sp),r1
bset #4,r1l
ldc r1l,ccr /* restore ccr */
mov.l er0,er4
mov.l #-ENOSYS,er0
mov.l er0,@(LER0:16,sp)
/* save top of frame */
mov.l sp,er0
jsr @SYMBOL_NAME(set_esp0)
cmp.l #NR_syscalls,er4
bcc SYMBOL_NAME(ret_from_exception):16
shll.l #2,er4
mov.l #SYMBOL_NAME(sys_call_table),er0
add.l er4,er0
mov.l @er0,er0
mov.l er0,er4
beq SYMBOL_NAME(ret_from_exception):16
mov.l sp,er2
and.w #0xe000,r2
mov.b @((TASK_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
btst #(TIF_SYSCALL_TRACE & 7),r2l
mov.l @(LER1:16,sp),er0
mov.l @(LER2:16,sp),er1
mov.l @(LER3:16,sp),er2
jsr @er4
mov.l er0,@(LER0:16,sp) /* save the return value */
#if defined(CONFIG_SYSCALL_PRINT)
jsr @SYMBOL_NAME(syscall_print)
#endif
bra SYMBOL_NAME(ret_from_exception):8
1:
jsr SYMBOL_NAME(syscall_trace)
mov.l @(LER1:16,sp),er0
mov.l @(LER2:16,sp),er1
mov.l @(LER3:16,sp),er2
jsr @er4
mov.l er0,@(LER0:16,sp) /* save the return value */
jsr @SYMBOL_NAME(syscall_trace)
bra SYMBOL_NAME(ret_from_exception):8
SYMBOL_NAME_LABEL(ret_from_fork)
mov.l er2,er0
jsr @SYMBOL_NAME(schedule_tail)
bra SYMBOL_NAME(ret_from_exception):8
SYMBOL_NAME_LABEL(reschedule)
/* save top of frame */
mov.l sp,er0
jsr @SYMBOL_NAME(set_esp0)
jsr @SYMBOL_NAME(schedule)
SYMBOL_NAME_LABEL(ret_from_exception)
#if defined(CONFIG_PREEMPT)
orc #0x80,ccr
#endif
SYMBOL_NAME_LABEL(ret_from_interrupt)
mov.b @(LCCR+1:16,sp),r0l
btst #4,r0l /* check if returning to kernel */
bne done:8 /* if so, skip resched, signals */
andc #0x7f,ccr
mov.l sp,er4
and.w #0xe000,r4
mov.l @(TI_FLAGS:16,er4),er1
and.l #_TIF_WORK_MASK,er1
beq done:8
1:
mov.l @(TI_FLAGS:16,er4),er1
btst #TIF_NEED_RESCHED,r1l
bne SYMBOL_NAME(reschedule):16
mov.l sp,er0
subs #4,er0 /* adjust retpc */
mov.l er2,er1
jsr @SYMBOL_NAME(do_signal)
#if defined(CONFIG_PREEMPT)
bra done:8 /* userspace thoru */
3:
btst #4,r0l
beq done:8 /* userspace thoru */
4:
mov.l @(TI_PRE_COUNT:16,er4),er1
bne done:8
mov.l @(TI_FLAGS:16,er4),er1
btst #TIF_NEED_RESCHED,r1l
beq done:8
mov.b r0l,r0l
bpl done:8 /* interrupt off (exception path?) */
mov.l #PREEMPT_ACTIVE,er1
mov.l er1,@(TI_PRE_COUNT:16,er4)
andc #0x7f,ccr
jsr @SYMBOL_NAME(schedule)
sub.l er1,er1
mov.l er1,@(TI_PRE_COUNT:16,er4)
orc #0x80,ccr
bra 4b:8
#endif
done:
RESTORE_ALL /* Does RTE */
SYMBOL_NAME_LABEL(resume)
/*
* er0 = prev
* er1 = next
* return last in er2
*/
/* save sr */
sub.w r3,r3
stc ccr,r3l
stc exr,r3h
mov.w r3,@(THREAD_CCR+2:16,er0)
/* disable interrupts */
orc #0x80,ccr
mov.l @SYMBOL_NAME(sw_usp),er3
mov.l er3,@(THREAD_USP:16,er0)
mov.l sp,@(THREAD_KSP:16,er0)
/* Skip address space switching if they are the same. */
/* FIXME: what did we hack out of here, this does nothing! */
mov.l @(THREAD_USP:16,er1),er0
mov.l er0,@SYMBOL_NAME(sw_usp)
mov.l @(THREAD_KSP:16,er1),sp
/* restore status register */
mov.w @(THREAD_CCR+2:16,er1),r3
ldc r3l,ccr
ldc r3h,exr
rts
SYMBOL_NAME_LABEL(trace_break)
subs #4,sp /* dummy LVEC */
SAVE_ALL
sub.l er1,er1
dec.l #1,er1
mov.l er1,@(LORIG,sp)
mov.l sp,er0
jsr @SYMBOL_NAME(set_esp0)
mov.l @SYMBOL_NAME(sw_usp),er0
mov.l @er0,er1
subs #2,er1
mov.l er1,@er0
and.w #0xff,e1
mov.l er1,er0
jsr @SYMBOL_NAME(trace_trap)
jmp @SYMBOL_NAME(ret_from_exception)
.section .bss
SYMBOL_NAME_LABEL(sw_ksp)
.space 4
SYMBOL_NAME_LABEL(sw_usp)
.space 4

6
arch/h8300/platform/h8s/generic/Makefile Normal file
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#
# Makefile for the linux kernel.
#
extra-y = crt0_$(MODEL).o
obj-y := timer.o

128
arch/h8300/platform/h8s/generic/crt0_ram.S Normal file
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/*
* linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend startup
* Target Archtecture: generic
* Memory Layout : RAM
*/
#define ASSEMBLY
#include <linux/config.h>
#include <asm/linkage.h>
#include <asm/regs267x.h>
#if !defined(CONFIG_BLKDEV_RESERVE)
#if defined(CONFIG_GDB_DEBUG)
#define RAMEND (__ramend - 0xc000)
#else
#define RAMEND __ramend
#endif
#else
#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
#endif
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(_command_line)
.global SYMBOL_NAME(_platform_gpio_table)
.global SYMBOL_NAME(_target_name)
.h8300s
.section .text
.file "crt0_ram.S"
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
mov.l #RAMEND,sp
ldc #0x80,ccr
ldc #0x00,exr
/* Peripheral Setup */
bclr #4,@INTCR:8 /* interrupt mode 2 */
bset #5,@INTCR:8
#if defined(CONFIG_MTD_UCLINUX)
/* move romfs image */
jsr @__move_romfs
#endif
/* .bss clear */
mov.l #__sbss,er5
mov.l er5,er6
mov.l #__ebss,er4
sub.l er5,er4
shlr #2,er4
sub.l er0,er0
1:
mov.l er0,@er5
adds #4,er5
dec.l #1,er4
bne 1b
/* copy kernel commandline */
mov.l #COMMAND_START,er5
mov.l #SYMBOL_NAME(command_line),er6
mov.w #512,r4
eepmov.w
/* uClinux kernel start */
ldc #0x90,ccr /* running kernel */
mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
jmp _exit
rts
/* I/O port assign information */
__platform_gpio_table:
mov.l #gpio_table,er0
rts
gpio_table:
;; P1DDR
;; used,ddr
.byte 0x00,0x00
;; P2DDR
.byte 0x00,0x00
;; P3DDR
.byte 0x00,0x00
;; dummy
.byte 0x00,0x00
;; P5DDR
.byte 0x00,0x00
;; P6DDR
.byte 0x00,0x00
;; P7DDR
.byte 0x00,0x00
;; P8DDR
.byte 0x00,0x00
;; dummy
.byte 0x00,0x00
;; PADDR
.byte 0x00,0x00
;; PBDDR
.byte 0x00,0x00
;; PCDDR
.byte 0x00,0x00
;; PDDDR
.byte 0x00,0x00
;; PEDDR
.byte 0x00,0x00
;; PFDDR
.byte 0x00,0x00
;; PGDDR
.byte 0x00,0x00
;; PHDDR
.byte 0x00,0x00
__target_name:
.asciz "generic"
.section .bootvec,"ax"
jmp @SYMBOL_NAME(_start)

129
arch/h8300/platform/h8s/generic/crt0_rom.S Normal file
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/*
* linux/arch/h8300/platform/h8s/generic/crt0_rom.S
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend startup
* Target Archtecture: generic
* Memory Layout : ROM
*/
#define ASSEMBLY
#include <linux/config.h>
#include <asm/linkage.h>
#include <asm/regs267x.h>
.global SYMBOL_NAME(_start)
.global SYMBOL_NAME(_command_line)
.global SYMBOL_NAME(_platform_gpio_table)
.global SYMBOL_NAME(_target_name)
.h8300s
.section .text
.file "crt0_rom.S"
/* CPU Reset entry */
SYMBOL_NAME_LABEL(_start)
mov.l #__ramend,sp
ldc #0x80,ccr
ldc #0,exr
bclr #4,@INTCR:8
bset #5,@INTCR:8 /* Interrupt mode 2 */
/* Peripheral Setup */
/* copy .data */
#if !defined(CONFIG_H8S_SIM)
mov.l #__begin_data,er5
mov.l #__sdata,er6
mov.l #__edata,er4
sub.l er6,er4
shlr.l #2,er4
1:
mov.l @er5+,er0
mov.l er0,@er6
adds #4,er6
dec.l #1,er4
bne 1b
#endif
/* .bss clear */
mov.l #__sbss,er5
mov.l #__ebss,er4
sub.l er5,er4
shlr.l #2,er4
sub.l er0,er0
1:
mov.l er0,@er5
adds #4,er5
dec.l #1,er4
bne 1b
/* linux kernel start */
ldc #0x90,ccr /* running kernel */
mov.l #SYMBOL_NAME(init_thread_union),sp
add.l #0x2000,sp
jsr @_start_kernel
_exit:
jmp _exit
rts
/* I/O port assign information */
__platform_gpio_table:
mov.l #gpio_table,er0
rts
gpio_table:
;; P1DDR
.byte 0x00,0x00
;; P2DDR
.byte 0x00,0x00
;; P3DDR
.byte 0x00,0x00
;; P4DDR
.byte 0x00,0x00
;; P5DDR
.byte 0x00,0x00
;; P6DDR
.byte 0x00,0x00
;; dummy
.byte 0x00,0x00
;; P8DDR
.byte 0x00,0x00
;; PADDR
.byte 0x00,0x00
;; PBDDR
.byte 0x00,0x00
;; PCDDR
.byte 0x00,0x00
;; PDDDR
.byte 0x00,0x00
;; PEDDR
.byte 0x00,0x00
;; PFDDR
.byte 0x00,0x00
;; PGDDR
.byte 0x00,0x00
;; PHDDR
.byte 0x00,0x00
.section .rodata
__target_name:
.asciz "generic"
.section .bss
__command_line:
.space 512
/* interrupt vector */
.section .vectors,"ax"
.long __start
.long __start
vector = 2
.rept 126-1
.long _interrupt_redirect_table+vector*4
vector = vector + 1
.endr

54
arch/h8300/platform/h8s/generic/timer.c Normal file
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/*
* linux/arch/h8300/platform/h8s/generic/timer.c
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Platform depend Timer Handler
*
*/
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/timex.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/regs267x.h>
#define CMFA 6
#define CMIEA 0x40
#define CCLR_CMA 0x08
#define CLK_DIV8192 0x03
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
{
/* 8bit timer module enabled */
ctrl_outb(ctrl_inb(MSTPCRL) & ~0x01, MSTPCRL);
/* setup 8bit timer ch1 */
ctrl_outb(H8300_TIMER_FREQ / HZ, _8TCORA1); /* set interval */
ctrl_outb(0x00, _8TCSR1); /* no output */
request_irq(76, timer_int, 0, "timer" ,0);
ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR1); /* start count */
}
void platform_timer_eoi(void)
{
*(volatile unsigned char *)_8TCSR1 &= ~(1 << CMFA);
}
void platform_gettod(int *year, int *mon, int *day, int *hour,
int *min, int *sec)
{
*year = *mon = *day = *hour = *min = *sec = 0;
}

303
arch/h8300/platform/h8s/ints.c Normal file
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/*
* linux/arch/h8300/platform/h8s/ints.c
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* Based on linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*
* Copyright 1996 Roman Zippel
* Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/seq_file.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/random.h>
#include <linux/hardirq.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/io.h>
#include <asm/setup.h>
#include <asm/gpio.h>
#include <asm/regs267x.h>
#include <asm/errno.h>
/*
* This structure has only 4 elements for speed reasons
*/
typedef struct irq_handler {
irqreturn_t (*handler)(int, void *, struct pt_regs *);
int flags;
int count;
void *dev_id;
const char *devname;
} irq_handler_t;
static irq_handler_t *irq_list[NR_IRQS];
/* IRQ pin assignment */
struct irq_pins {
unsigned char port_no;
unsigned char bit_no;
};
/* ISTR = 0 */
const static struct irq_pins irq_assign_table0[16]={
{H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1},
{H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3},
{H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5},
{H8300_GPIO_P5,H8300_GPIO_B6},{H8300_GPIO_P5,H8300_GPIO_B7},
{H8300_GPIO_P6,H8300_GPIO_B0},{H8300_GPIO_P6,H8300_GPIO_B1},
{H8300_GPIO_P6,H8300_GPIO_B2},{H8300_GPIO_P6,H8300_GPIO_B3},
{H8300_GPIO_P6,H8300_GPIO_B4},{H8300_GPIO_P6,H8300_GPIO_B5},
{H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2},
};
/* ISTR = 1 */
const static struct irq_pins irq_assign_table1[16]={
{H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1},
{H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3},
{H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5},
{H8300_GPIO_PH,H8300_GPIO_B2},{H8300_GPIO_PH,H8300_GPIO_B3},
{H8300_GPIO_P2,H8300_GPIO_B0},{H8300_GPIO_P2,H8300_GPIO_B1},
{H8300_GPIO_P2,H8300_GPIO_B2},{H8300_GPIO_P2,H8300_GPIO_B3},
{H8300_GPIO_P2,H8300_GPIO_B4},{H8300_GPIO_P2,H8300_GPIO_B5},
{H8300_GPIO_P2,H8300_GPIO_B6},{H8300_GPIO_P2,H8300_GPIO_B7},
};
static short use_kmalloc = 0;
extern unsigned long *interrupt_redirect_table;
#define CPU_VECTOR ((unsigned long *)0x000000)
#define ADDR_MASK (0xffffff)
static inline unsigned long *get_vector_address(void)
{
volatile unsigned long *rom_vector = CPU_VECTOR;
unsigned long base,tmp;
int vec_no;
base = rom_vector[EXT_IRQ0] & ADDR_MASK;
/* check romvector format */
for (vec_no = EXT_IRQ1; vec_no <= EXT_IRQ15; vec_no++) {
if ((base+(vec_no - EXT_IRQ0)*4) != (rom_vector[vec_no] & ADDR_MASK))
return NULL;
}
/* ramvector base address */
base -= EXT_IRQ0*4;
/* writerble check */
tmp = ~(*(unsigned long *)base);
(*(unsigned long *)base) = tmp;
if ((*(unsigned long *)base) != tmp)
return NULL;
return (unsigned long *)base;
}
void __init init_IRQ(void)
{
#if defined(CONFIG_RAMKERNEL)
int i;
unsigned long *ramvec,*ramvec_p;
unsigned long break_vec;
ramvec = get_vector_address();
if (ramvec == NULL)
panic("interrupt vector serup failed.");
else
printk("virtual vector at 0x%08lx\n",(unsigned long)ramvec);
#if defined(CONFIG_GDB_DEBUG)
/* save orignal break vector */
break_vec = ramvec[TRAP3_VEC];
#else
break_vec = VECTOR(trace_break);
#endif
/* create redirect table */
for (ramvec_p = ramvec, i = 0; i < NR_IRQS; i++)
*ramvec_p++ = REDIRECT(interrupt_entry);
/* set special vector */
ramvec[TRAP0_VEC] = VECTOR(system_call);
ramvec[TRAP3_VEC] = break_vec;
interrupt_redirect_table = ramvec;
#ifdef DUMP_VECTOR
ramvec_p = ramvec;
for (i = 0; i < NR_IRQS; i++) {
if ((i % 8) == 0)
printk("\n%p: ",ramvec_p);
printk("%p ",*ramvec_p);
ramvec_p++;
}
printk("\n");
#endif
#endif
}
int request_irq(unsigned int irq,
irqreturn_t (*handler)(int, void *, struct pt_regs *),
unsigned long flags, const char *devname, void *dev_id)
{
unsigned short ptn = 1 << (irq - EXT_IRQ0);
irq_handler_t *irq_handle;
if (irq < 0 || irq >= NR_IRQS) {
printk("Incorrect IRQ %d from %s\n", irq, devname);
return -EINVAL;
}
if (irq_list[irq])
return -EBUSY; /* already used */
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
/* initialize IRQ pin */
unsigned int port_no,bit_no;
if (*(volatile unsigned short *)ITSR & ptn) {
port_no = irq_assign_table1[irq - EXT_IRQ0].port_no;
bit_no = irq_assign_table1[irq - EXT_IRQ0].bit_no;
} else {
port_no = irq_assign_table0[irq - EXT_IRQ0].port_no;
bit_no = irq_assign_table0[irq - EXT_IRQ0].bit_no;
}
if (H8300_GPIO_RESERVE(port_no, bit_no) == 0)
return -EBUSY; /* pin already use */
H8300_GPIO_DDR(port_no, bit_no, H8300_GPIO_INPUT);
*(volatile unsigned short *)ISR &= ~ptn; /* ISR clear */
}
if (use_kmalloc)
irq_handle = (irq_handler_t *)kmalloc(sizeof(irq_handler_t), GFP_ATOMIC);
else {
/* use bootmem allocater */
irq_handle = (irq_handler_t *)alloc_bootmem(sizeof(irq_handler_t));
irq_handle = (irq_handler_t *)((unsigned long)irq_handle | 0x80000000);
}
if (irq_handle == NULL)
return -ENOMEM;
irq_handle->handler = handler;
irq_handle->flags = flags;
irq_handle->count = 0;
irq_handle->dev_id = dev_id;
irq_handle->devname = devname;
irq_list[irq] = irq_handle;
if (irq_handle->flags & SA_SAMPLE_RANDOM)
rand_initialize_irq(irq);
/* enable interrupt */
/* compatible i386 */
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15)
*(volatile unsigned short *)IER |= ptn;
return 0;
}
EXPORT_SYMBOL(request_irq);
void free_irq(unsigned int irq, void *dev_id)
{
if (irq >= NR_IRQS)
return;
if (irq_list[irq]->dev_id != dev_id)
printk("%s: Removing probably wrong IRQ %d from %s\n",
__FUNCTION__, irq, irq_list[irq]->devname);
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
/* disable interrupt & release IRQ pin */
unsigned short port_no,bit_no;
*(volatile unsigned short *)ISR &= ~(1 << (irq - EXT_IRQ0));
*(volatile unsigned short *)IER |= 1 << (irq - EXT_IRQ0);
if (*(volatile unsigned short *)ITSR & (1 << (irq - EXT_IRQ0))) {
port_no = irq_assign_table1[irq - EXT_IRQ0].port_no;
bit_no = irq_assign_table1[irq - EXT_IRQ0].bit_no;
} else {
port_no = irq_assign_table0[irq - EXT_IRQ0].port_no;
bit_no = irq_assign_table0[irq - EXT_IRQ0].bit_no;
}
H8300_GPIO_FREE(port_no, bit_no);
}
if (((unsigned long)irq_list[irq] & 0x80000000) == 0) {
kfree(irq_list[irq]);
irq_list[irq] = NULL;
}
}
EXPORT_SYMBOL(free_irq);
unsigned long probe_irq_on (void)
{
return 0;
}
EXPORT_SYMBOL(probe_irq_on);
int probe_irq_off (unsigned long irqs)
{
return 0;
}
EXPORT_SYMBOL(probe_irq_off);
void enable_irq(unsigned int irq)
{
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15)
*(volatile unsigned short *)IER |= 1 << (irq - EXT_IRQ0);
}
void disable_irq(unsigned int irq)
{
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15)
*(volatile unsigned short *)IER &= ~(1 << (irq - EXT_IRQ0));
}
asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
{
irq_enter();
/* ISR clear */
/* compatible i386 */
if (vec >= EXT_IRQ0 && vec <= EXT_IRQ15)
*(volatile unsigned short *)ISR &= ~(1 << (vec - EXT_IRQ0));
if (vec < NR_IRQS) {
if (irq_list[vec]) {
irq_list[vec]->handler(vec, irq_list[vec]->dev_id, fp);
irq_list[vec]->count++;
if (irq_list[vec]->flags & SA_SAMPLE_RANDOM)
add_interrupt_randomness(vec);
}
} else {
BUG();
}
irq_exit();
}
int show_interrupts(struct seq_file *p, void *v)
{
int i = *(loff_t *) v;
if ((i < NR_IRQS) && (irq_list[i] !=NULL)) {
seq_printf(p, "%3d: %10u ",i,irq_list[i]->count);
seq_printf(p, "%s\n", irq_list[i]->devname);
}
return 0;
}
void init_irq_proc(void)
{
}
static int __init enable_kmalloc(void)
{
use_kmalloc = 1;
return 0;
}
core_initcall(enable_kmalloc);

105
arch/h8300/platform/h8s/ints_h8s.c Normal file
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/*
* linux/arch/h8300/platform/h8s/ints_h8s.c
* Interrupt handling CPU variants
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <asm/ptrace.h>
#include <asm/traps.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/regs267x.h>
/* saved vector list */
const int __initdata h8300_saved_vectors[]={
#if defined(CONFIG_GDB_DEBUG)
TRACE_VEC,
TRAP3_VEC,
#endif
-1
};
/* trap entry table */
const unsigned long __initdata h8300_trap_table[NR_TRAPS]={
0,0,0,0,0,
(unsigned long)trace_break, /* TRACE */
0,0,
(unsigned long)system_call, /* TRAPA #0 */
0,0,0,0,0,0,0
};
/* IRQ pin assignment */
struct irq_pins {
unsigned char port_no;
unsigned char bit_no;
} __attribute__((aligned(1),packed));
/* ISTR = 0 */
const static struct irq_pins irq_assign_table0[16]={
{H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1},
{H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3},
{H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5},
{H8300_GPIO_P5,H8300_GPIO_B6},{H8300_GPIO_P5,H8300_GPIO_B7},
{H8300_GPIO_P6,H8300_GPIO_B0},{H8300_GPIO_P6,H8300_GPIO_B1},
{H8300_GPIO_P6,H8300_GPIO_B2},{H8300_GPIO_P6,H8300_GPIO_B3},
{H8300_GPIO_P6,H8300_GPIO_B4},{H8300_GPIO_P6,H8300_GPIO_B5},
{H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2},
};
/* ISTR = 1 */
const static struct irq_pins irq_assign_table1[16]={
{H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1},
{H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3},
{H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5},
{H8300_GPIO_PH,H8300_GPIO_B2},{H8300_GPIO_PH,H8300_GPIO_B3},
{H8300_GPIO_P2,H8300_GPIO_B0},{H8300_GPIO_P2,H8300_GPIO_B1},
{H8300_GPIO_P2,H8300_GPIO_B2},{H8300_GPIO_P2,H8300_GPIO_B3},
{H8300_GPIO_P2,H8300_GPIO_B4},{H8300_GPIO_P2,H8300_GPIO_B5},
{H8300_GPIO_P2,H8300_GPIO_B6},{H8300_GPIO_P2,H8300_GPIO_B7},
};
/* IRQ to GPIO pinno transrate */
#define IRQ_GPIO_MAP(irqbit,irq,port,bit) \
do { \
if (*(volatile unsigned short *)ITSR & irqbit) { \
port = irq_assign_table1[irq - EXT_IRQ0].port_no; \
bit = irq_assign_table1[irq - EXT_IRQ0].bit_no; \
} else { \
port = irq_assign_table0[irq - EXT_IRQ0].port_no; \
bit = irq_assign_table0[irq - EXT_IRQ0].bit_no; \
} \
} while(0)
int h8300_enable_irq_pin(unsigned int irq)
{
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
unsigned short ptn = 1 << (irq - EXT_IRQ0);
unsigned int port_no,bit_no;
IRQ_GPIO_MAP(ptn, irq, port_no, bit_no);
if (H8300_GPIO_RESERVE(port_no, bit_no) == 0)
return -EBUSY; /* pin already use */
H8300_GPIO_DDR(port_no, bit_no, H8300_GPIO_INPUT);
*(volatile unsigned short *)ISR &= ~ptn; /* ISR clear */
}
return 0;
}
void h8300_disable_irq_pin(unsigned int irq)
{
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
/* disable interrupt & release IRQ pin */
unsigned short ptn = 1 << (irq - EXT_IRQ0);
unsigned short port_no,bit_no;
*(volatile unsigned short *)ISR &= ~ptn;
*(volatile unsigned short *)IER &= ~ptn;
IRQ_GPIO_MAP(ptn, irq, port_no, bit_no);
H8300_GPIO_FREE(port_no, bit_no);
}
}

84
arch/h8300/platform/h8s/ptrace_h8s.c Normal file
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/*
* linux/arch/h8300/platform/h8s/ptrace_h8s.c
* ptrace cpu depend helper functions
*
* Yoshinori Sato <ysato@users.sourceforge.jp>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of
* this archive for more details.
*/
#include <linux/linkage.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <asm/ptrace.h>
#define CCR_MASK 0x6f
#define EXR_TRACE 0x80
/* Mapping from PT_xxx to the stack offset at which the register is
saved. Notice that usp has no stack-slot and needs to be treated
specially (see get_reg/put_reg below). */
static const int h8300_register_offset[] = {
PT_REG(er1), PT_REG(er2), PT_REG(er3), PT_REG(er4),
PT_REG(er5), PT_REG(er6), PT_REG(er0), PT_REG(orig_er0),
PT_REG(ccr), PT_REG(pc), 0, PT_REG(exr)
};
/* read register */
long h8300_get_reg(struct task_struct *task, int regno)
{
switch (regno) {
case PT_USP:
return task->thread.usp + sizeof(long)*2 + 2;
case PT_CCR:
case PT_EXR:
return *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
default:
return *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]);
}
}
/* write register */
int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
{
unsigned short oldccr;
switch (regno) {
case PT_USP:
task->thread.usp = data - sizeof(long)*2 - 2;
case PT_CCR:
oldccr = *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
oldccr &= ~CCR_MASK;
data &= CCR_MASK;
data |= oldccr;
*(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
break;
case PT_EXR:
/* exr modify not support */
return -EIO;
default:
*(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
break;
}
return 0;
}
/* disable singlestep */
void h8300_disable_trace(struct task_struct *child)
{
*(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) &= ~EXR_TRACE;
}
/* enable singlestep */
void h8300_enable_trace(struct task_struct *child)
{
*(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) |= EXR_TRACE;
}
asmlinkage void trace_trap(unsigned long bp)
{
(void)bp;
force_sig(SIGTRAP,current);
}