ASoC: core: Rework SOC_DOUBLE_R_SX_TLV add SOC_SINGLE_SX_TLV
Some codecs namely Cirrus Logic Codecs have a way of wrapping the dB scale around 0dB without 0dB being in the middle. Rework of SOC_DOUBLE_R_SX_TLV to be more consistent with other asoc tlv macros. Add single register macro : SOC_SINGLE_SX_TLV. Use snd_soc_info_volsw for .info Use snd_soc_get_volsw_sx, snd_soc_put_volsw_sx for single and double. kcontrols for CS42L51 and CS42L73 are adjusted to these new TLV Macros. The max value is determined by: (number of steps) +1 for 0dB +max from codec datasheet. Signed-off-by: Brian Austin <brian.austin@cirrus.com> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@@ -141,15 +141,15 @@ static const struct soc_enum cs42l51_chan_mix =
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static const struct snd_kcontrol_new cs42l51_snd_controls[] = {
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SOC_DOUBLE_R_SX_TLV("PCM Playback Volume",
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CS42L51_PCMA_VOL, CS42L51_PCMB_VOL,
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7, 0xffffff99, 0x18, adc_pcm_tlv),
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6, 0x19, 0x7F, adc_pcm_tlv),
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SOC_DOUBLE_R("PCM Playback Switch",
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CS42L51_PCMA_VOL, CS42L51_PCMB_VOL, 7, 1, 1),
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SOC_DOUBLE_R_SX_TLV("Analog Playback Volume",
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CS42L51_AOUTA_VOL, CS42L51_AOUTB_VOL,
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8, 0xffffff19, 0x18, aout_tlv),
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0, 0x34, 0xE4, aout_tlv),
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SOC_DOUBLE_R_SX_TLV("ADC Mixer Volume",
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CS42L51_ADCA_VOL, CS42L51_ADCB_VOL,
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7, 0xffffff99, 0x18, adc_pcm_tlv),
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6, 0x19, 0x7F, adc_pcm_tlv),
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SOC_DOUBLE_R("ADC Mixer Switch",
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CS42L51_ADCA_VOL, CS42L51_ADCB_VOL, 7, 1, 1),
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SOC_SINGLE("Playback Deemphasis Switch", CS42L51_DAC_CTL, 3, 1, 0),
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