pinctrl: tegra: avoid parked_reg and parked_bank

NVIDIA's Tegra210 support the park bit to make pinmux configuration
enable/disable. If parked bit is 1 then configuration does not apply
and if it is 0 then pinmux configuration applies. This is to support
to avoid any glitch in pinmux configurations.

The parked bit is part of mux register and mux bank and hence it is
not required to have member for the parked_reg and parked bank very
similar to other bit field of the same register.

Remove the need of the parked register and parked bank and get whether
parked function supported or not by parked_bit.

This is to make the parked bit handling same as other fields of mux
registers.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Laxman Dewangan
2016-05-03 00:17:32 +05:30
committed by Linus Walleij
szülő b22ef2a097
commit 1d18a3f0f0
7 fájl változott, egészen pontosan 14 új sor hozzáadva és 20 régi sor törölve

Fájl megtekintése

@@ -632,11 +632,11 @@ static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx)
u32 val;
for (i = 0; i < pmx->soc->ngroups; ++i) {
if (pmx->soc->groups[i].parked_reg >= 0) {
g = &pmx->soc->groups[i];
val = pmx_readl(pmx, g->parked_bank, g->parked_reg);
g = &pmx->soc->groups[i];
if (g->parked_bit >= 0) {
val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
val &= ~(1 << g->parked_bit);
pmx_writel(pmx, val, g->parked_bank, g->parked_reg);
pmx_writel(pmx, val, g->mux_bank, g->mux_reg);
}
}
}