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SPI: add CSR SiRFprimaII SPI controller driver

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CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features:
* Master and slave modes
* 8-/12-/16-/32-bit data unit
* 256 bytes receive data FIFO and 256 bytes transmit data FIFO
* Multi-unit frame
* Configurable SPI_EN (chip select pin) active state
* Configurable SPI_CLK polarity
* Configurable SPI_CLK phase
* Configurable MSB/LSB first

Signed-off-by: Zhiwu Song <zhiwu.song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Zhiwu Song
2012-02-13 17:45:38 +08:00
committed by Grant Likely
parent de3bd7e6de
commit 1cc2df9d6f
3 changed files with 695 additions and 0 deletions
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7
drivers/spi/Kconfig
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@@ -336,6 +336,13 @@ config SPI_SH_HSPI
help
SPI driver for SuperH HSPI blocks.
config SPI_SIRF
tristate "CSR SiRFprimaII SPI controller"
depends on ARCH_PRIMA2
select SPI_BITBANG
help
SPI driver for CSR SiRFprimaII SoCs
config SPI_STMP3XXX
tristate "Freescale STMP37xx/378x SPI/SSP controller"
depends on ARCH_STMP3XXX