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Merge tag 'soc-fsl-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers

Browse Source 
Various updates to soc/fsl for 4.19

Moves DPAA2 DPIO driver from staging to fsl/soc
Adds multiple-pin support to QE gpio driver

* tag 'soc-fsl-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: cleanup Kconfig menu
  soc: fsl: dpio: Convert DPIO documentation to .rst
  staging: fsl-mc: Remove remaining files
  staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl
  staging: fsl-dpaa2: eth: move generic FD defines to DPIO
  soc: fsl: qe: gpio: Add qe_gpio_set_multiple

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2018-07-26 00:12:56 -07:00
parent 92f06c384b 4625210899
commit 1ca8c0a763
29 changed files with 100 additions and 63 deletions
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438
include/soc/fsl/dpaa2-fd.h Normal file
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/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
/*
* Copyright 2014-2016 Freescale Semiconductor Inc.
* Copyright 2016 NXP
*
*/
#ifndef __FSL_DPAA2_FD_H
#define __FSL_DPAA2_FD_H
#include <linux/kernel.h>
/**
* DOC: DPAA2 FD - Frame Descriptor APIs for DPAA2
*
* Frame Descriptors (FDs) are used to describe frame data in the DPAA2.
* Frames can be enqueued and dequeued to Frame Queues (FQs) which are consumed
* by the various DPAA accelerators (WRIOP, SEC, PME, DCE)
*
* There are three types of frames: single, scatter gather, and frame lists.
*
* The set of APIs in this file must be used to create, manipulate and
* query Frame Descriptors.
*/
/**
* struct dpaa2_fd - Struct describing FDs
* @words: for easier/faster copying the whole FD structure
* @addr: address in the FD
* @len: length in the FD
* @bpid: buffer pool ID
* @format_offset: format, offset, and short-length fields
* @frc: frame context
* @ctrl: control bits...including dd, sc, va, err, etc
* @flc: flow context address
*
* This structure represents the basic Frame Descriptor used in the system.
*/
struct dpaa2_fd {
union {
u32 words[8];
struct dpaa2_fd_simple {
__le64 addr;
__le32 len;
__le16 bpid;
__le16 format_offset;
__le32 frc;
__le32 ctrl;
__le64 flc;
} simple;
};
};
#define FD_SHORT_LEN_FLAG_MASK 0x1
#define FD_SHORT_LEN_FLAG_SHIFT 14
#define FD_SHORT_LEN_MASK 0x3FFFF
#define FD_OFFSET_MASK 0x0FFF
#define FD_FORMAT_MASK 0x3
#define FD_FORMAT_SHIFT 12
#define FD_BPID_MASK 0x3FFF
#define SG_SHORT_LEN_FLAG_MASK 0x1
#define SG_SHORT_LEN_FLAG_SHIFT 14
#define SG_SHORT_LEN_MASK 0x1FFFF
#define SG_OFFSET_MASK 0x0FFF
#define SG_FORMAT_MASK 0x3
#define SG_FORMAT_SHIFT 12
#define SG_BPID_MASK 0x3FFF
#define SG_FINAL_FLAG_MASK 0x1
#define SG_FINAL_FLAG_SHIFT 15
/* Error bits in FD CTRL */
#define FD_CTRL_ERR_MASK 0x000000FF
#define FD_CTRL_UFD 0x00000004
#define FD_CTRL_SBE 0x00000008
#define FD_CTRL_FLC 0x00000010
#define FD_CTRL_FSE 0x00000020
#define FD_CTRL_FAERR 0x00000040
/* Annotation bits in FD CTRL */
#define FD_CTRL_PTA 0x00800000
#define FD_CTRL_PTV1 0x00400000
enum dpaa2_fd_format {
dpaa2_fd_single = 0,
dpaa2_fd_list,
dpaa2_fd_sg
};
/**
* dpaa2_fd_get_addr() - get the addr field of frame descriptor
* @fd: the given frame descriptor
*
* Return the address in the frame descriptor.
*/
static inline dma_addr_t dpaa2_fd_get_addr(const struct dpaa2_fd *fd)
{
return (dma_addr_t)le64_to_cpu(fd->simple.addr);
}
/**
* dpaa2_fd_set_addr() - Set the addr field of frame descriptor
* @fd: the given frame descriptor
* @addr: the address needs to be set in frame descriptor
*/
static inline void dpaa2_fd_set_addr(struct dpaa2_fd *fd, dma_addr_t addr)
{
fd->simple.addr = cpu_to_le64(addr);
}
/**
* dpaa2_fd_get_frc() - Get the frame context in the frame descriptor
* @fd: the given frame descriptor
*
* Return the frame context field in the frame descriptor.
*/
static inline u32 dpaa2_fd_get_frc(const struct dpaa2_fd *fd)
{
return le32_to_cpu(fd->simple.frc);
}
/**
* dpaa2_fd_set_frc() - Set the frame context in the frame descriptor
* @fd: the given frame descriptor
* @frc: the frame context needs to be set in frame descriptor
*/
static inline void dpaa2_fd_set_frc(struct dpaa2_fd *fd, u32 frc)
{
fd->simple.frc = cpu_to_le32(frc);
}
/**
* dpaa2_fd_get_ctrl() - Get the control bits in the frame descriptor
* @fd: the given frame descriptor
*
* Return the control bits field in the frame descriptor.
*/
static inline u32 dpaa2_fd_get_ctrl(const struct dpaa2_fd *fd)
{
return le32_to_cpu(fd->simple.ctrl);
}
/**
* dpaa2_fd_set_ctrl() - Set the control bits in the frame descriptor
* @fd: the given frame descriptor
* @ctrl: the control bits to be set in the frame descriptor
*/
static inline void dpaa2_fd_set_ctrl(struct dpaa2_fd *fd, u32 ctrl)
{
fd->simple.ctrl = cpu_to_le32(ctrl);
}
/**
* dpaa2_fd_get_flc() - Get the flow context in the frame descriptor
* @fd: the given frame descriptor
*
* Return the flow context in the frame descriptor.
*/
static inline dma_addr_t dpaa2_fd_get_flc(const struct dpaa2_fd *fd)
{
return (dma_addr_t)le64_to_cpu(fd->simple.flc);
}
/**
* dpaa2_fd_set_flc() - Set the flow context field of frame descriptor
* @fd: the given frame descriptor
* @flc_addr: the flow context needs to be set in frame descriptor
*/
static inline void dpaa2_fd_set_flc(struct dpaa2_fd *fd, dma_addr_t flc_addr)
{
fd->simple.flc = cpu_to_le64(flc_addr);
}
static inline bool dpaa2_fd_short_len(const struct dpaa2_fd *fd)
{
return !!((le16_to_cpu(fd->simple.format_offset) >>
FD_SHORT_LEN_FLAG_SHIFT) & FD_SHORT_LEN_FLAG_MASK);
}
/**
* dpaa2_fd_get_len() - Get the length in the frame descriptor
* @fd: the given frame descriptor
*
* Return the length field in the frame descriptor.
*/
static inline u32 dpaa2_fd_get_len(const struct dpaa2_fd *fd)
{
if (dpaa2_fd_short_len(fd))
return le32_to_cpu(fd->simple.len) & FD_SHORT_LEN_MASK;
return le32_to_cpu(fd->simple.len);
}
/**
* dpaa2_fd_set_len() - Set the length field of frame descriptor
* @fd: the given frame descriptor
* @len: the length needs to be set in frame descriptor
*/
static inline void dpaa2_fd_set_len(struct dpaa2_fd *fd, u32 len)
{
fd->simple.len = cpu_to_le32(len);
}
/**
* dpaa2_fd_get_offset() - Get the offset field in the frame descriptor
* @fd: the given frame descriptor
*
* Return the offset.
*/
static inline uint16_t dpaa2_fd_get_offset(const struct dpaa2_fd *fd)
{
return le16_to_cpu(fd->simple.format_offset) & FD_OFFSET_MASK;
}
/**
* dpaa2_fd_set_offset() - Set the offset field of frame descriptor
* @fd: the given frame descriptor
* @offset: the offset needs to be set in frame descriptor
*/
static inline void dpaa2_fd_set_offset(struct dpaa2_fd *fd, uint16_t offset)
{
fd->simple.format_offset &= cpu_to_le16(~FD_OFFSET_MASK);
fd->simple.format_offset |= cpu_to_le16(offset);
}
/**
* dpaa2_fd_get_format() - Get the format field in the frame descriptor
* @fd: the given frame descriptor
*
* Return the format.
*/
static inline enum dpaa2_fd_format dpaa2_fd_get_format(
const struct dpaa2_fd *fd)
{
return (enum dpaa2_fd_format)((le16_to_cpu(fd->simple.format_offset)
>> FD_FORMAT_SHIFT) & FD_FORMAT_MASK);
}
/**
* dpaa2_fd_set_format() - Set the format field of frame descriptor
* @fd: the given frame descriptor
* @format: the format needs to be set in frame descriptor
*/
static inline void dpaa2_fd_set_format(struct dpaa2_fd *fd,
enum dpaa2_fd_format format)
{
fd->simple.format_offset &=
cpu_to_le16(~(FD_FORMAT_MASK << FD_FORMAT_SHIFT));
fd->simple.format_offset |= cpu_to_le16(format << FD_FORMAT_SHIFT);
}
/**
* dpaa2_fd_get_bpid() - Get the bpid field in the frame descriptor
* @fd: the given frame descriptor
*
* Return the buffer pool id.
*/
static inline uint16_t dpaa2_fd_get_bpid(const struct dpaa2_fd *fd)
{
return le16_to_cpu(fd->simple.bpid) & FD_BPID_MASK;
}
/**
* dpaa2_fd_set_bpid() - Set the bpid field of frame descriptor
* @fd: the given frame descriptor
* @bpid: buffer pool id to be set
*/
static inline void dpaa2_fd_set_bpid(struct dpaa2_fd *fd, uint16_t bpid)
{
fd->simple.bpid &= cpu_to_le16(~(FD_BPID_MASK));
fd->simple.bpid |= cpu_to_le16(bpid);
}
/**
* struct dpaa2_sg_entry - the scatter-gathering structure
* @addr: address of the sg entry
* @len: length in this sg entry
* @bpid: buffer pool id
* @format_offset: format and offset fields
*/
struct dpaa2_sg_entry {
__le64 addr;
__le32 len;
__le16 bpid;
__le16 format_offset;
};
enum dpaa2_sg_format {
dpaa2_sg_single = 0,
dpaa2_sg_frame_data,
dpaa2_sg_sgt_ext
};
/* Accessors for SG entry fields */
/**
* dpaa2_sg_get_addr() - Get the address from SG entry
* @sg: the given scatter-gathering object
*
* Return the address.
*/
static inline dma_addr_t dpaa2_sg_get_addr(const struct dpaa2_sg_entry *sg)
{
return (dma_addr_t)le64_to_cpu(sg->addr);
}
/**
* dpaa2_sg_set_addr() - Set the address in SG entry
* @sg: the given scatter-gathering object
* @addr: the address to be set
*/
static inline void dpaa2_sg_set_addr(struct dpaa2_sg_entry *sg, dma_addr_t addr)
{
sg->addr = cpu_to_le64(addr);
}
static inline bool dpaa2_sg_short_len(const struct dpaa2_sg_entry *sg)
{
return !!((le16_to_cpu(sg->format_offset) >> SG_SHORT_LEN_FLAG_SHIFT)
& SG_SHORT_LEN_FLAG_MASK);
}
/**
* dpaa2_sg_get_len() - Get the length in SG entry
* @sg: the given scatter-gathering object
*
* Return the length.
*/
static inline u32 dpaa2_sg_get_len(const struct dpaa2_sg_entry *sg)
{
if (dpaa2_sg_short_len(sg))
return le32_to_cpu(sg->len) & SG_SHORT_LEN_MASK;
return le32_to_cpu(sg->len);
}
/**
* dpaa2_sg_set_len() - Set the length in SG entry
* @sg: the given scatter-gathering object
* @len: the length to be set
*/
static inline void dpaa2_sg_set_len(struct dpaa2_sg_entry *sg, u32 len)
{
sg->len = cpu_to_le32(len);
}
/**
* dpaa2_sg_get_offset() - Get the offset in SG entry
* @sg: the given scatter-gathering object
*
* Return the offset.
*/
static inline u16 dpaa2_sg_get_offset(const struct dpaa2_sg_entry *sg)
{
return le16_to_cpu(sg->format_offset) & SG_OFFSET_MASK;
}
/**
* dpaa2_sg_set_offset() - Set the offset in SG entry
* @sg: the given scatter-gathering object
* @offset: the offset to be set
*/
static inline void dpaa2_sg_set_offset(struct dpaa2_sg_entry *sg,
u16 offset)
{
sg->format_offset &= cpu_to_le16(~SG_OFFSET_MASK);
sg->format_offset |= cpu_to_le16(offset);
}
/**
* dpaa2_sg_get_format() - Get the SG format in SG entry
* @sg: the given scatter-gathering object
*
* Return the format.
*/
static inline enum dpaa2_sg_format
dpaa2_sg_get_format(const struct dpaa2_sg_entry *sg)
{
return (enum dpaa2_sg_format)((le16_to_cpu(sg->format_offset)
>> SG_FORMAT_SHIFT) & SG_FORMAT_MASK);
}
/**
* dpaa2_sg_set_format() - Set the SG format in SG entry
* @sg: the given scatter-gathering object
* @format: the format to be set
*/
static inline void dpaa2_sg_set_format(struct dpaa2_sg_entry *sg,
enum dpaa2_sg_format format)
{
sg->format_offset &= cpu_to_le16(~(SG_FORMAT_MASK << SG_FORMAT_SHIFT));
sg->format_offset |= cpu_to_le16(format << SG_FORMAT_SHIFT);
}
/**
* dpaa2_sg_get_bpid() - Get the buffer pool id in SG entry
* @sg: the given scatter-gathering object
*
* Return the bpid.
*/
static inline u16 dpaa2_sg_get_bpid(const struct dpaa2_sg_entry *sg)
{
return le16_to_cpu(sg->bpid) & SG_BPID_MASK;
}
/**
* dpaa2_sg_set_bpid() - Set the buffer pool id in SG entry
* @sg: the given scatter-gathering object
* @bpid: the bpid to be set
*/
static inline void dpaa2_sg_set_bpid(struct dpaa2_sg_entry *sg, u16 bpid)
{
sg->bpid &= cpu_to_le16(~(SG_BPID_MASK));
sg->bpid |= cpu_to_le16(bpid);
}
/**
* dpaa2_sg_is_final() - Check final bit in SG entry
* @sg: the given scatter-gathering object
*
* Return bool.
*/
static inline bool dpaa2_sg_is_final(const struct dpaa2_sg_entry *sg)
{
return !!(le16_to_cpu(sg->format_offset) >> SG_FINAL_FLAG_SHIFT);
}
/**
* dpaa2_sg_set_final() - Set the final bit in SG entry
* @sg: the given scatter-gathering object
* @final: the final boolean to be set
*/
static inline void dpaa2_sg_set_final(struct dpaa2_sg_entry *sg, bool final)
{
sg->format_offset &= cpu_to_le16((~(SG_FINAL_FLAG_MASK
<< SG_FINAL_FLAG_SHIFT)) & 0xFFFF);
sg->format_offset |= cpu_to_le16(final << SG_FINAL_FLAG_SHIFT);
}
#endif /* __FSL_DPAA2_FD_H */

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/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
/*
* Copyright 2014-2016 Freescale Semiconductor Inc.
* Copyright 2016 NXP
*
*/
#ifndef __FSL_DPAA2_GLOBAL_H
#define __FSL_DPAA2_GLOBAL_H
#include <linux/types.h>
#include <linux/cpumask.h>
#include "dpaa2-fd.h"
struct dpaa2_dq {
union {
struct common {
u8 verb;
u8 reserved[63];
} common;
struct dq {
u8 verb;
u8 stat;
__le16 seqnum;
__le16 oprid;
u8 reserved;
u8 tok;
__le32 fqid;
u32 reserved2;
__le32 fq_byte_cnt;
__le32 fq_frm_cnt;
__le64 fqd_ctx;
u8 fd[32];
} dq;
struct scn {
u8 verb;
u8 stat;
u8 state;
u8 reserved;
__le32 rid_tok;
__le64 ctx;
} scn;
};
};
/* Parsing frame dequeue results */
/* FQ empty */
#define DPAA2_DQ_STAT_FQEMPTY 0x80
/* FQ held active */
#define DPAA2_DQ_STAT_HELDACTIVE 0x40
/* FQ force eligible */
#define DPAA2_DQ_STAT_FORCEELIGIBLE 0x20
/* valid frame */
#define DPAA2_DQ_STAT_VALIDFRAME 0x10
/* FQ ODP enable */
#define DPAA2_DQ_STAT_ODPVALID 0x04
/* volatile dequeue */
#define DPAA2_DQ_STAT_VOLATILE 0x02
/* volatile dequeue command is expired */
#define DPAA2_DQ_STAT_EXPIRED 0x01
#define DQ_FQID_MASK 0x00FFFFFF
#define DQ_FRAME_COUNT_MASK 0x00FFFFFF
/**
* dpaa2_dq_flags() - Get the stat field of dequeue response
* @dq: the dequeue result.
*/
static inline u32 dpaa2_dq_flags(const struct dpaa2_dq *dq)
{
return dq->dq.stat;
}
/**
* dpaa2_dq_is_pull() - Check whether the dq response is from a pull
* command.
* @dq: the dequeue result
*
* Return 1 for volatile(pull) dequeue, 0 for static dequeue.
*/
static inline int dpaa2_dq_is_pull(const struct dpaa2_dq *dq)
{
return (int)(dpaa2_dq_flags(dq) & DPAA2_DQ_STAT_VOLATILE);
}
/**
* dpaa2_dq_is_pull_complete() - Check whether the pull command is completed.
* @dq: the dequeue result
*
* Return boolean.
*/
static inline bool dpaa2_dq_is_pull_complete(const struct dpaa2_dq *dq)
{
return !!(dpaa2_dq_flags(dq) & DPAA2_DQ_STAT_EXPIRED);
}
/**
* dpaa2_dq_seqnum() - Get the seqnum field in dequeue response
* @dq: the dequeue result
*
* seqnum is valid only if VALIDFRAME flag is TRUE
*
* Return seqnum.
*/
static inline u16 dpaa2_dq_seqnum(const struct dpaa2_dq *dq)
{
return le16_to_cpu(dq->dq.seqnum);
}
/**
* dpaa2_dq_odpid() - Get the odpid field in dequeue response
* @dq: the dequeue result
*
* odpid is valid only if ODPVALID flag is TRUE.
*
* Return odpid.
*/
static inline u16 dpaa2_dq_odpid(const struct dpaa2_dq *dq)
{
return le16_to_cpu(dq->dq.oprid);
}
/**
* dpaa2_dq_fqid() - Get the fqid in dequeue response
* @dq: the dequeue result
*
* Return fqid.
*/
static inline u32 dpaa2_dq_fqid(const struct dpaa2_dq *dq)
{
return le32_to_cpu(dq->dq.fqid) & DQ_FQID_MASK;
}
/**
* dpaa2_dq_byte_count() - Get the byte count in dequeue response
* @dq: the dequeue result
*
* Return the byte count remaining in the FQ.
*/
static inline u32 dpaa2_dq_byte_count(const struct dpaa2_dq *dq)
{
return le32_to_cpu(dq->dq.fq_byte_cnt);
}
/**
* dpaa2_dq_frame_count() - Get the frame count in dequeue response
* @dq: the dequeue result
*
* Return the frame count remaining in the FQ.
*/
static inline u32 dpaa2_dq_frame_count(const struct dpaa2_dq *dq)
{
return le32_to_cpu(dq->dq.fq_frm_cnt) & DQ_FRAME_COUNT_MASK;
}
/**
* dpaa2_dq_fd_ctx() - Get the frame queue context in dequeue response
* @dq: the dequeue result
*
* Return the frame queue context.
*/
static inline u64 dpaa2_dq_fqd_ctx(const struct dpaa2_dq *dq)
{
return le64_to_cpu(dq->dq.fqd_ctx);
}
/**
* dpaa2_dq_fd() - Get the frame descriptor in dequeue response
* @dq: the dequeue result
*
* Return the frame descriptor.
*/
static inline const struct dpaa2_fd *dpaa2_dq_fd(const struct dpaa2_dq *dq)
{
return (const struct dpaa2_fd *)&dq->dq.fd[0];
}
#endif /* __FSL_DPAA2_GLOBAL_H */

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/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
/*
* Copyright 2014-2016 Freescale Semiconductor Inc.
* Copyright NXP
*
*/
#ifndef __FSL_DPAA2_IO_H
#define __FSL_DPAA2_IO_H
#include <linux/types.h>
#include <linux/cpumask.h>
#include <linux/irqreturn.h>
#include "dpaa2-fd.h"
#include "dpaa2-global.h"
struct dpaa2_io;
struct dpaa2_io_store;
struct device;
/**
* DOC: DPIO Service
*
* The DPIO service provides APIs for users to interact with the datapath
* by enqueueing and dequeing frame descriptors.
*
* The following set of APIs can be used to enqueue and dequeue frames
* as well as producing notification callbacks when data is available
* for dequeue.
*/
#define DPAA2_IO_ANY_CPU -1
/**
* struct dpaa2_io_desc - The DPIO descriptor
* @receives_notifications: Use notificaton mode. Non-zero if the DPIO
* has a channel.
* @has_8prio: Set to non-zero for channel with 8 priority WQs. Ignored
* unless receives_notification is TRUE.
* @cpu: The cpu index that at least interrupt handlers will
* execute on.
* @stash_affinity: The stash affinity for this portal favour 'cpu'
* @regs_cena: The cache enabled regs.
* @regs_cinh: The cache inhibited regs
* @dpio_id: The dpio index
* @qman_version: The qman version
*
* Describes the attributes and features of the DPIO object.
*/
struct dpaa2_io_desc {
int receives_notifications;
int has_8prio;
int cpu;
void *regs_cena;
void __iomem *regs_cinh;
int dpio_id;
u32 qman_version;
};
struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc);
void dpaa2_io_down(struct dpaa2_io *d);
irqreturn_t dpaa2_io_irq(struct dpaa2_io *obj);
struct dpaa2_io *dpaa2_io_service_select(int cpu);
/**
* struct dpaa2_io_notification_ctx - The DPIO notification context structure
* @cb: The callback to be invoked when the notification arrives
* @is_cdan: Zero for FQDAN, non-zero for CDAN
* @id: FQID or channel ID, needed for rearm
* @desired_cpu: The cpu on which the notifications will show up. Use
* DPAA2_IO_ANY_CPU if don't care
* @dpio_id: The dpio index
* @qman64: The 64-bit context value shows up in the FQDAN/CDAN.
* @node: The list node
* @dpio_private: The dpio object internal to dpio_service
*
* Used when a FQDAN/CDAN registration is made by drivers.
*/
struct dpaa2_io_notification_ctx {
void (*cb)(struct dpaa2_io_notification_ctx *ctx);
int is_cdan;
u32 id;
int desired_cpu;
int dpio_id;
u64 qman64;
struct list_head node;
void *dpio_private;
};
int dpaa2_io_service_register(struct dpaa2_io *service,
struct dpaa2_io_notification_ctx *ctx);
void dpaa2_io_service_deregister(struct dpaa2_io *service,
struct dpaa2_io_notification_ctx *ctx);
int dpaa2_io_service_rearm(struct dpaa2_io *service,
struct dpaa2_io_notification_ctx *ctx);
int dpaa2_io_service_pull_channel(struct dpaa2_io *d, u32 channelid,
struct dpaa2_io_store *s);
int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d, u32 qdid, u8 prio,
u16 qdbin, const struct dpaa2_fd *fd);
int dpaa2_io_service_release(struct dpaa2_io *d, u32 bpid,
const u64 *buffers, unsigned int num_buffers);
int dpaa2_io_service_acquire(struct dpaa2_io *d, u32 bpid,
u64 *buffers, unsigned int num_buffers);
struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames,
struct device *dev);
void dpaa2_io_store_destroy(struct dpaa2_io_store *s);
struct dpaa2_dq *dpaa2_io_store_next(struct dpaa2_io_store *s, int *is_last);
#endif /* __FSL_DPAA2_IO_H */