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ARM: dts: socfpga: update more missing reset properties

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Add reset property for dma, can and sdram on socfpga gen5.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Simon Goldschmidt
2019-01-29 20:46:25 +01:00
committed by Dinh Nguyen
parent 37f7453a4b
commit 1c909b2dfe
1 changed files with 4 additions and 0 deletions
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4
arch/arm/boot/dts/socfpga.dtsi
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@@ -84,6 +84,7 @@
#dma-requests = <32>; #dma-requests = <32>;
clocks = <&l4_main_clk>; clocks = <&l4_main_clk>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
resets = <&rst DMA_RESET>;
}; };
}; };
@@ -100,6 +101,7 @@
reg = <0xffc00000 0x1000>; reg = <0xffc00000 0x1000>;
interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>; interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
clocks = <&can0_clk>; clocks = <&can0_clk>;
resets = <&rst CAN0_RESET>;
status = "disabled"; status = "disabled";
}; };
@@ -108,6 +110,7 @@
reg = <0xffc01000 0x1000>; reg = <0xffc01000 0x1000>;
interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>; interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
clocks = <&can1_clk>; clocks = <&can1_clk>;
resets = <&rst CAN1_RESET>;
status = "disabled"; status = "disabled";
}; };
@@ -791,6 +794,7 @@
sdr: sdr@ffc25000 { sdr: sdr@ffc25000 {
compatible = "altr,sdr-ctl", "syscon"; compatible = "altr,sdr-ctl", "syscon";
reg = <0xffc25000 0x1000>; reg = <0xffc25000 0x1000>;
resets = <&rst SDR_RESET>;
}; };
sdramedac { sdramedac {