iommu/vt-d: Shared virtual address in scalable mode
This patch enables the current SVA (Shared Virtual Address) implementation to work in the scalable mode. Cc: Ashok Raj <ashok.raj@intel.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Sanjay Kumar <sanjay.k.kumar@intel.com> Signed-off-by: Liu Yi L <yi.l.liu@intel.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@@ -54,14 +54,7 @@
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#define CONTEXT_TT_MULTI_LEVEL 0
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#define CONTEXT_TT_DEV_IOTLB 1
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#define CONTEXT_TT_PASS_THROUGH 2
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/* Extended context entry types */
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#define CONTEXT_TT_PT_PASID 4
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#define CONTEXT_TT_PT_PASID_DEV_IOTLB 5
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#define CONTEXT_TT_MASK (7ULL << 2)
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#define CONTEXT_DINVE (1ULL << 8)
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#define CONTEXT_PRS (1ULL << 9)
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#define CONTEXT_PASIDE (1ULL << 11)
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#define CONTEXT_PASIDE BIT_ULL(3)
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/*
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* Intel IOMMU register specification per version 1.0 public spec.
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