xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

[MIPS] Add support for BCM47XX CPUs.

Browse Source 
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
    
It originally comes from the OpenWrt patches.
    
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Aurelien Jarno
2007-09-25 15:40:12 +02:00
committed by Ralf Baechle
parent ea202c632a
commit 1c0c13eb93
14 changed files with 385 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
include/asm-mips/cpu.h
View File

@@ -105,6 +105,13 @@
#define PRID_IMP_SR71000 0x0400
/*
* These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
*/
#define PRID_IMP_BCM4710 0x4000
#define PRID_IMP_BCM3302 0x9000
/*
* Definitions for 7:0 on legacy processors
*/
@@ -217,8 +224,9 @@
#define CPU_R14000 64
#define CPU_LOONGSON1 65
#define CPU_LOONGSON2 66
#define CPU_LAST 66
#define CPU_BCM3302 67
#define CPU_BCM4710 68
#define CPU_LAST 68
/*
* ISA Level encodings