Merge branch 'drm-core-next' into drm-linus
Bring all core drm changes into 2.6.32 tree and resolve the conflict that occurs. Conflicts: drivers/gpu/drm/drm_fb_helper.c
This commit is contained in:
@@ -15,7 +15,6 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
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intel_lvds.o \
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intel_bios.o \
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intel_dp.o \
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intel_dp_i2c.o \
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intel_hdmi.o \
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intel_sdvo.o \
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intel_modes.o \
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|
@@ -333,6 +333,7 @@ static struct drm_driver driver = {
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.mmap = drm_gem_mmap,
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.poll = drm_poll,
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.fasync = drm_fasync,
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.read = drm_read,
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#ifdef CONFIG_COMPAT
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.compat_ioctl = i915_compat_ioctl,
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#endif
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@@ -32,7 +32,7 @@
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#include "intel_drv.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#include "intel_dp.h"
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#include "drm_dp_helper.h"
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#include "drm_crtc_helper.h"
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@@ -33,7 +33,7 @@
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#include "intel_drv.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#include "intel_dp.h"
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#include "drm_dp_helper.h"
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#define DP_LINK_STATUS_SIZE 6
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#define DP_LINK_CHECK_TIMEOUT (10 * 1000)
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@@ -382,17 +382,77 @@ intel_dp_aux_native_read(struct intel_output *intel_output,
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}
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static int
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intel_dp_i2c_aux_ch(struct i2c_adapter *adapter,
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uint8_t *send, int send_bytes,
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uint8_t *recv, int recv_bytes)
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intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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uint8_t write_byte, uint8_t *read_byte)
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{
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struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
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struct intel_dp_priv *dp_priv = container_of(adapter,
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struct intel_dp_priv,
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adapter);
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struct intel_output *intel_output = dp_priv->intel_output;
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uint16_t address = algo_data->address;
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uint8_t msg[5];
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uint8_t reply[2];
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int msg_bytes;
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int reply_bytes;
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int ret;
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return intel_dp_aux_ch(intel_output,
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send, send_bytes, recv, recv_bytes);
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/* Set up the command byte */
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if (mode & MODE_I2C_READ)
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msg[0] = AUX_I2C_READ << 4;
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else
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msg[0] = AUX_I2C_WRITE << 4;
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if (!(mode & MODE_I2C_STOP))
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msg[0] |= AUX_I2C_MOT << 4;
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msg[1] = address >> 8;
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msg[2] = address;
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switch (mode) {
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case MODE_I2C_WRITE:
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msg[3] = 0;
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msg[4] = write_byte;
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msg_bytes = 5;
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reply_bytes = 1;
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break;
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case MODE_I2C_READ:
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msg[3] = 0;
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msg_bytes = 4;
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reply_bytes = 2;
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break;
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default:
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msg_bytes = 3;
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reply_bytes = 1;
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break;
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}
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for (;;) {
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ret = intel_dp_aux_ch(intel_output,
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msg, msg_bytes,
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reply, reply_bytes);
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if (ret < 0) {
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DRM_DEBUG("aux_ch failed %d\n", ret);
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return ret;
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}
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switch (reply[0] & AUX_I2C_REPLY_MASK) {
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case AUX_I2C_REPLY_ACK:
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if (mode == MODE_I2C_READ) {
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*read_byte = reply[1];
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}
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return reply_bytes - 1;
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case AUX_I2C_REPLY_NACK:
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DRM_DEBUG("aux_ch nack\n");
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return -EREMOTEIO;
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case AUX_I2C_REPLY_DEFER:
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DRM_DEBUG("aux_ch defer\n");
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udelay(100);
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break;
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default:
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DRM_ERROR("aux_ch invalid reply 0x%02x\n", reply[0]);
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return -EREMOTEIO;
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}
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}
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}
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static int
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|
@@ -1,144 +0,0 @@
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/*
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* Copyright © 2008 Keith Packard
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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||||
* the above copyright notice appear in all copies and that both that copyright
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||||
* notice and this permission notice appear in supporting documentation, and
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* that the name of the copyright holders not be used in advertising or
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* publicity pertaining to distribution of the software without specific,
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* written prior permission. The copyright holders make no representations
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* about the suitability of this software for any purpose. It is provided "as
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* is" without express or implied warranty.
|
||||
*
|
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* THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
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* EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
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* OF THIS SOFTWARE.
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*/
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#ifndef _INTEL_DP_H_
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#define _INTEL_DP_H_
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/* From the VESA DisplayPort spec */
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#define AUX_NATIVE_WRITE 0x8
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#define AUX_NATIVE_READ 0x9
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#define AUX_I2C_WRITE 0x0
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#define AUX_I2C_READ 0x1
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#define AUX_I2C_STATUS 0x2
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#define AUX_I2C_MOT 0x4
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#define AUX_NATIVE_REPLY_ACK (0x0 << 4)
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#define AUX_NATIVE_REPLY_NACK (0x1 << 4)
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#define AUX_NATIVE_REPLY_DEFER (0x2 << 4)
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#define AUX_NATIVE_REPLY_MASK (0x3 << 4)
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#define AUX_I2C_REPLY_ACK (0x0 << 6)
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#define AUX_I2C_REPLY_NACK (0x1 << 6)
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#define AUX_I2C_REPLY_DEFER (0x2 << 6)
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#define AUX_I2C_REPLY_MASK (0x3 << 6)
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/* AUX CH addresses */
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#define DP_LINK_BW_SET 0x100
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# define DP_LINK_BW_1_62 0x06
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# define DP_LINK_BW_2_7 0x0a
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#define DP_LANE_COUNT_SET 0x101
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# define DP_LANE_COUNT_MASK 0x0f
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# define DP_LANE_COUNT_ENHANCED_FRAME_EN (1 << 7)
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#define DP_TRAINING_PATTERN_SET 0x102
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# define DP_TRAINING_PATTERN_DISABLE 0
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# define DP_TRAINING_PATTERN_1 1
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# define DP_TRAINING_PATTERN_2 2
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# define DP_TRAINING_PATTERN_MASK 0x3
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# define DP_LINK_QUAL_PATTERN_DISABLE (0 << 2)
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# define DP_LINK_QUAL_PATTERN_D10_2 (1 << 2)
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# define DP_LINK_QUAL_PATTERN_ERROR_RATE (2 << 2)
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# define DP_LINK_QUAL_PATTERN_PRBS7 (3 << 2)
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# define DP_LINK_QUAL_PATTERN_MASK (3 << 2)
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# define DP_RECOVERED_CLOCK_OUT_EN (1 << 4)
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# define DP_LINK_SCRAMBLING_DISABLE (1 << 5)
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# define DP_SYMBOL_ERROR_COUNT_BOTH (0 << 6)
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# define DP_SYMBOL_ERROR_COUNT_DISPARITY (1 << 6)
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# define DP_SYMBOL_ERROR_COUNT_SYMBOL (2 << 6)
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# define DP_SYMBOL_ERROR_COUNT_MASK (3 << 6)
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#define DP_TRAINING_LANE0_SET 0x103
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#define DP_TRAINING_LANE1_SET 0x104
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#define DP_TRAINING_LANE2_SET 0x105
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#define DP_TRAINING_LANE3_SET 0x106
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# define DP_TRAIN_VOLTAGE_SWING_MASK 0x3
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# define DP_TRAIN_VOLTAGE_SWING_SHIFT 0
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# define DP_TRAIN_MAX_SWING_REACHED (1 << 2)
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# define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0)
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# define DP_TRAIN_VOLTAGE_SWING_600 (1 << 0)
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# define DP_TRAIN_VOLTAGE_SWING_800 (2 << 0)
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# define DP_TRAIN_VOLTAGE_SWING_1200 (3 << 0)
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# define DP_TRAIN_PRE_EMPHASIS_MASK (3 << 3)
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# define DP_TRAIN_PRE_EMPHASIS_0 (0 << 3)
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# define DP_TRAIN_PRE_EMPHASIS_3_5 (1 << 3)
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# define DP_TRAIN_PRE_EMPHASIS_6 (2 << 3)
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# define DP_TRAIN_PRE_EMPHASIS_9_5 (3 << 3)
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# define DP_TRAIN_PRE_EMPHASIS_SHIFT 3
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# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED (1 << 5)
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#define DP_DOWNSPREAD_CTRL 0x107
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# define DP_SPREAD_AMP_0_5 (1 << 4)
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#define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
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# define DP_SET_ANSI_8B10B (1 << 0)
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#define DP_LANE0_1_STATUS 0x202
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#define DP_LANE2_3_STATUS 0x203
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# define DP_LANE_CR_DONE (1 << 0)
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# define DP_LANE_CHANNEL_EQ_DONE (1 << 1)
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# define DP_LANE_SYMBOL_LOCKED (1 << 2)
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#define DP_LANE_ALIGN_STATUS_UPDATED 0x204
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#define DP_INTERLANE_ALIGN_DONE (1 << 0)
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#define DP_DOWNSTREAM_PORT_STATUS_CHANGED (1 << 6)
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#define DP_LINK_STATUS_UPDATED (1 << 7)
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#define DP_SINK_STATUS 0x205
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#define DP_RECEIVE_PORT_0_STATUS (1 << 0)
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#define DP_RECEIVE_PORT_1_STATUS (1 << 1)
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#define DP_ADJUST_REQUEST_LANE0_1 0x206
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#define DP_ADJUST_REQUEST_LANE2_3 0x207
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#define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK 0x03
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#define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0
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#define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK 0x0c
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#define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT 2
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#define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK 0x30
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#define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4
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#define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0
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#define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6
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struct i2c_algo_dp_aux_data {
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bool running;
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u16 address;
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int (*aux_ch) (struct i2c_adapter *adapter,
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uint8_t *send, int send_bytes,
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uint8_t *recv, int recv_bytes);
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};
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int
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i2c_dp_aux_add_bus(struct i2c_adapter *adapter);
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|
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#endif /* _INTEL_DP_H_ */
|
@@ -1,273 +0,0 @@
|
||||
/*
|
||||
* Copyright © 2009 Keith Packard
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and its
|
||||
* documentation for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice appear in all copies and that both that copyright
|
||||
* notice and this permission notice appear in supporting documentation, and
|
||||
* that the name of the copyright holders not be used in advertising or
|
||||
* publicity pertaining to distribution of the software without specific,
|
||||
* written prior permission. The copyright holders make no representations
|
||||
* about the suitability of this software for any purpose. It is provided "as
|
||||
* is" without express or implied warranty.
|
||||
*
|
||||
* THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
|
||||
* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
|
||||
* OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/i2c.h>
|
||||
#include "intel_dp.h"
|
||||
#include "drmP.h"
|
||||
|
||||
/* Run a single AUX_CH I2C transaction, writing/reading data as necessary */
|
||||
|
||||
#define MODE_I2C_START 1
|
||||
#define MODE_I2C_WRITE 2
|
||||
#define MODE_I2C_READ 4
|
||||
#define MODE_I2C_STOP 8
|
||||
|
||||
static int
|
||||
i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode,
|
||||
uint8_t write_byte, uint8_t *read_byte)
|
||||
{
|
||||
struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
|
||||
uint16_t address = algo_data->address;
|
||||
uint8_t msg[5];
|
||||
uint8_t reply[2];
|
||||
int msg_bytes;
|
||||
int reply_bytes;
|
||||
int ret;
|
||||
|
||||
/* Set up the command byte */
|
||||
if (mode & MODE_I2C_READ)
|
||||
msg[0] = AUX_I2C_READ << 4;
|
||||
else
|
||||
msg[0] = AUX_I2C_WRITE << 4;
|
||||
|
||||
if (!(mode & MODE_I2C_STOP))
|
||||
msg[0] |= AUX_I2C_MOT << 4;
|
||||
|
||||
msg[1] = address >> 8;
|
||||
msg[2] = address;
|
||||
|
||||
switch (mode) {
|
||||
case MODE_I2C_WRITE:
|
||||
msg[3] = 0;
|
||||
msg[4] = write_byte;
|
||||
msg_bytes = 5;
|
||||
reply_bytes = 1;
|
||||
break;
|
||||
case MODE_I2C_READ:
|
||||
msg[3] = 0;
|
||||
msg_bytes = 4;
|
||||
reply_bytes = 2;
|
||||
break;
|
||||
default:
|
||||
msg_bytes = 3;
|
||||
reply_bytes = 1;
|
||||
break;
|
||||
}
|
||||
|
||||
for (;;) {
|
||||
ret = (*algo_data->aux_ch)(adapter,
|
||||
msg, msg_bytes,
|
||||
reply, reply_bytes);
|
||||
if (ret < 0) {
|
||||
DRM_DEBUG("aux_ch failed %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
switch (reply[0] & AUX_I2C_REPLY_MASK) {
|
||||
case AUX_I2C_REPLY_ACK:
|
||||
if (mode == MODE_I2C_READ) {
|
||||
*read_byte = reply[1];
|
||||
}
|
||||
return reply_bytes - 1;
|
||||
case AUX_I2C_REPLY_NACK:
|
||||
DRM_DEBUG("aux_ch nack\n");
|
||||
return -EREMOTEIO;
|
||||
case AUX_I2C_REPLY_DEFER:
|
||||
DRM_DEBUG("aux_ch defer\n");
|
||||
udelay(100);
|
||||
break;
|
||||
default:
|
||||
DRM_ERROR("aux_ch invalid reply 0x%02x\n", reply[0]);
|
||||
return -EREMOTEIO;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* I2C over AUX CH
|
||||
*/
|
||||
|
||||
/*
|
||||
* Send the address. If the I2C link is running, this 'restarts'
|
||||
* the connection with the new address, this is used for doing
|
||||
* a write followed by a read (as needed for DDC)
|
||||
*/
|
||||
static int
|
||||
i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading)
|
||||
{
|
||||
struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
|
||||
int mode = MODE_I2C_START;
|
||||
int ret;
|
||||
|
||||
if (reading)
|
||||
mode |= MODE_I2C_READ;
|
||||
else
|
||||
mode |= MODE_I2C_WRITE;
|
||||
algo_data->address = address;
|
||||
algo_data->running = true;
|
||||
ret = i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Stop the I2C transaction. This closes out the link, sending
|
||||
* a bare address packet with the MOT bit turned off
|
||||
*/
|
||||
static void
|
||||
i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading)
|
||||
{
|
||||
struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
|
||||
int mode = MODE_I2C_STOP;
|
||||
|
||||
if (reading)
|
||||
mode |= MODE_I2C_READ;
|
||||
else
|
||||
mode |= MODE_I2C_WRITE;
|
||||
if (algo_data->running) {
|
||||
(void) i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
|
||||
algo_data->running = false;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Write a single byte to the current I2C address, the
|
||||
* the I2C link must be running or this returns -EIO
|
||||
*/
|
||||
static int
|
||||
i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte)
|
||||
{
|
||||
struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
|
||||
int ret;
|
||||
|
||||
if (!algo_data->running)
|
||||
return -EIO;
|
||||
|
||||
ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_WRITE, byte, NULL);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Read a single byte from the current I2C address, the
|
||||
* I2C link must be running or this returns -EIO
|
||||
*/
|
||||
static int
|
||||
i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret)
|
||||
{
|
||||
struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
|
||||
int ret;
|
||||
|
||||
if (!algo_data->running)
|
||||
return -EIO;
|
||||
|
||||
ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_READ, 0, byte_ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter,
|
||||
struct i2c_msg *msgs,
|
||||
int num)
|
||||
{
|
||||
int ret = 0;
|
||||
bool reading = false;
|
||||
int m;
|
||||
int b;
|
||||
|
||||
for (m = 0; m < num; m++) {
|
||||
u16 len = msgs[m].len;
|
||||
u8 *buf = msgs[m].buf;
|
||||
reading = (msgs[m].flags & I2C_M_RD) != 0;
|
||||
ret = i2c_algo_dp_aux_address(adapter, msgs[m].addr, reading);
|
||||
if (ret < 0)
|
||||
break;
|
||||
if (reading) {
|
||||
for (b = 0; b < len; b++) {
|
||||
ret = i2c_algo_dp_aux_get_byte(adapter, &buf[b]);
|
||||
if (ret < 0)
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
for (b = 0; b < len; b++) {
|
||||
ret = i2c_algo_dp_aux_put_byte(adapter, buf[b]);
|
||||
if (ret < 0)
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (ret < 0)
|
||||
break;
|
||||
}
|
||||
if (ret >= 0)
|
||||
ret = num;
|
||||
i2c_algo_dp_aux_stop(adapter, reading);
|
||||
DRM_DEBUG("dp_aux_xfer return %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static u32
|
||||
i2c_algo_dp_aux_functionality(struct i2c_adapter *adapter)
|
||||
{
|
||||
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
|
||||
I2C_FUNC_SMBUS_READ_BLOCK_DATA |
|
||||
I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
|
||||
I2C_FUNC_10BIT_ADDR;
|
||||
}
|
||||
|
||||
static const struct i2c_algorithm i2c_dp_aux_algo = {
|
||||
.master_xfer = i2c_algo_dp_aux_xfer,
|
||||
.functionality = i2c_algo_dp_aux_functionality,
|
||||
};
|
||||
|
||||
static void
|
||||
i2c_dp_aux_reset_bus(struct i2c_adapter *adapter)
|
||||
{
|
||||
(void) i2c_algo_dp_aux_address(adapter, 0, false);
|
||||
(void) i2c_algo_dp_aux_stop(adapter, false);
|
||||
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter)
|
||||
{
|
||||
adapter->algo = &i2c_dp_aux_algo;
|
||||
adapter->retries = 3;
|
||||
i2c_dp_aux_reset_bus(adapter);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
|
||||
{
|
||||
int error;
|
||||
|
||||
error = i2c_dp_aux_prepare_bus(adapter);
|
||||
if (error)
|
||||
return error;
|
||||
error = i2c_add_adapter(adapter);
|
||||
return error;
|
||||
}
|
||||
EXPORT_SYMBOL(i2c_dp_aux_add_bus);
|
Reference in New Issue
Block a user