x86, SFI, irq: Provide basic irqdomain support
Enhance SFI to provide basic support of irqdomain with identity mapping between GSIs and IRQs. Some Intel MID platforms assumes identity mapping between GSI and IRQ, so we can't dynamically allocate IRQ number on demand. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: H. Peter Anvin <hpa@linux.intel.com> Cc: sfi-devel@simplefirmware.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Len Brown <lenb@kernel.org> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Link: http://lkml.kernel.org/r/1402302011-23642-28-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Thomas Gleixner

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@@ -217,6 +217,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
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* MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
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* IOAPIC RTE entries, so we just enable RTE for the device.
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*/
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if (mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC) < 0)
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return -EBUSY;
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irq_attr.ioapic = mp_find_ioapic(dev->irq);
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irq_attr.ioapic_pin = dev->irq;
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irq_attr.trigger = 1; /* level */
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