Merge branch 'powerpc-next' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc

This commit is contained in:
Paul Mackerras
2008-09-21 18:18:21 -05:00
32 changed files with 4676 additions and 109 deletions

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/*
* GE Fanuc SBC610 Device Tree Source
*
* Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* Based on: SBS CM6 Device Tree Source
* Copyright 2007 SBS Technologies GmbH & Co. KG
* And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
* Copyright 2006 Freescale Semiconductor Inc.
*/
/*
* Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
*/
/dts-v1/;
/ {
model = "GEF_SBC610";
compatible = "gef,sbc610";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8641@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>; // 32 bytes
i-cache-line-size = <32>; // 32 bytes
d-cache-size = <32768>; // L1, 32K
i-cache-size = <32768>; // L1, 32K
timebase-frequency = <0>; // From uboot
bus-frequency = <0>; // From uboot
clock-frequency = <0>; // From uboot
};
PowerPC,8641@1 {
device_type = "cpu";
reg = <1>;
d-cache-line-size = <32>; // 32 bytes
i-cache-line-size = <32>; // 32 bytes
d-cache-size = <32768>; // L1, 32K
i-cache-size = <32768>; // L1, 32K
timebase-frequency = <0>; // From uboot
bus-frequency = <0>; // From uboot
clock-frequency = <0>; // From uboot
};
};
memory {
device_type = "memory";
reg = <0x0 0x40000000>; // set by uboot
};
soc@fef00000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
compatible = "simple-bus";
ranges = <0x0 0xfef00000 0x00100000>;
reg = <0xfef00000 0x100000>; // CCSRBAR 1M
bus-frequency = <0>;
i2c1: i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <0x2b 0x2>;
interrupt-parent = <&mpic>;
dfsrr;
eti@6b {
compatible = "dallas,ds1682";
reg = <0x6b>;
};
};
i2c2: i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
interrupts = <0x2b 0x2>;
interrupt-parent = <&mpic>;
dfsrr;
};
dma@21300 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
reg = <0x21300 0x4>;
ranges = <0x0 0x21100 0x200>;
cell-index = <0>;
dma-channel@0 {
compatible = "fsl,mpc8641-dma-channel",
"fsl,eloplus-dma-channel";
reg = <0x0 0x80>;
cell-index = <0>;
interrupt-parent = <&mpic>;
interrupts = <20 2>;
};
dma-channel@80 {
compatible = "fsl,mpc8641-dma-channel",
"fsl,eloplus-dma-channel";
reg = <0x80 0x80>;
cell-index = <1>;
interrupt-parent = <&mpic>;
interrupts = <21 2>;
};
dma-channel@100 {
compatible = "fsl,mpc8641-dma-channel",
"fsl,eloplus-dma-channel";
reg = <0x100 0x80>;
cell-index = <2>;
interrupt-parent = <&mpic>;
interrupts = <22 2>;
};
dma-channel@180 {
compatible = "fsl,mpc8641-dma-channel",
"fsl,eloplus-dma-channel";
reg = <0x180 0x80>;
cell-index = <3>;
interrupt-parent = <&mpic>;
interrupts = <23 2>;
};
};
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <0x0 0x1>;
reg = <1>;
};
phy2: ethernet-phy@2 {
interrupt-parent = <&mpic>;
interrupts = <0x0 0x1>;
reg = <3>;
};
};
enet0: ethernet@24000 {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
phy-connection-type = "gmii";
};
enet1: ethernet@26000 {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x26000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy2>;
phy-connection-type = "gmii";
};
serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
interrupts = <0x2a 0x2>;
interrupt-parent = <&mpic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
interrupts = <0x1c 0x2>;
interrupt-parent = <&mpic>;
};
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
};
global-utilities@e0000 {
compatible = "fsl,mpc8641-guts";
reg = <0xe0000 0x1000>;
fsl,has-rstcr;
};
};
pci0: pcie@fef08000 {
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xfef08000 0x1000>;
bus-range = <0x0 0xff>;
ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <0x18 0x2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
0x0000 0x0 0x0 0x4 &mpic 0x3 0x1
>;
pcie@0 {
reg = <0 0 0 0 0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0x0 0x80000000
0x02000000 0x0 0x80000000
0x0 0x40000000
0x01000000 0x0 0x00000000
0x01000000 0x0 0x00000000
0x0 0x00400000>;
};
};
};

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/*
* Device Tree for the MGCOGE plattform from keymile
*
* Copyright 2008 DENX Software Engineering GmbH
* Heiko Schocher <hs@denx.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "MGCOGE";
compatible = "keymile,mgcoge";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &eth0;
serial0 = &smc2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8247@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <16384>;
i-cache-size = <16384>;
timebase-frequency = <0>; /* Filled in by U-Boot */
clock-frequency = <0>; /* Filled in by U-Boot */
bus-frequency = <0>; /* Filled in by U-Boot */
};
};
localbus@f0010100 {
compatible = "fsl,mpc8247-localbus",
"fsl,pq2-localbus",
"simple-bus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0xf0010100 0x40>;
ranges = <0 0 0xfe000000 0x00400000
5 0 0x50000000 0x20000000
>; /* Filled in by U-Boot */
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x0 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <1>;
device-width = <1>;
partition@0 {
label = "u-boot";
reg = <0 0x40000>;
};
partition@40000 {
label = "env";
reg = <0x40000 0x20000>;
};
partition@60000 {
label = "kernel";
reg = <0x60000 0x220000>;
};
partition@280000 {
label = "dtb";
reg = <0x280000 0x20000>;
};
};
flash@5,0 {
compatible = "cfi-flash";
reg = <5 0x0 0x2000000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
device-width = <2>;
partition@0 {
label = "ramdisk";
reg = <0 0x7a0000>;
};
partition@7a0000 {
label = "user";
reg = <0x7a0000 0x1860000>;
};
};
};
memory {
device_type = "memory";
reg = <0 0>; /* Filled in by U-Boot */
};
soc@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus";
ranges = <0x00000000 0xf0000000 0x00053000>;
// Temporary until code stops depending on it.
device_type = "soc";
cpm@119c0 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
compatible = "fsl,mpc8247-cpm", "fsl,cpm2",
"simple-bus";
reg = <0x119c0 0x30>;
ranges;
muram {
compatible = "fsl,cpm-muram";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0x80 0x1f80 0x9800 0x800>;
};
};
brg@119f0 {
compatible = "fsl,mpc8247-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
reg = <0x119f0 0x10 0x115f0 0x10>;
};
/* Monitor port/SMC2 */
smc2: serial@11a90 {
device_type = "serial";
compatible = "fsl,mpc8247-smc-uart",
"fsl,cpm2-smc-uart";
reg = <0x11a90 0x20 0x88fc 0x02>;
interrupts = <5 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <2>;
fsl,cpm-command = <0x21200000>;
current-speed = <0>; /* Filled in by U-Boot */
};
eth0: ethernet@11a60 {
device_type = "network";
compatible = "fsl,mpc8247-scc-enet",
"fsl,cpm2-scc-enet";
reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>;
local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
interrupts = <43 8>;
interrupt-parent = <&PIC>;
linux,network-index = <0>;
fsl,cpm-command = <0xce00000>;
fixed-link = <0 0 10 0 0>;
};
};
PIC: interrupt-controller@10c00 {
#interrupt-cells = <2>;
interrupt-controller;
reg = <0x10c00 0x80>;
compatible = "fsl,mpc8247-pic", "fsl,pq2-pic";
};
};
};

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@@ -0,0 +1,163 @@
/*
* MGSUVD Device Tree Source
*
* Copyright 2008 DENX Software Engineering GmbH
* Heiko Schocher <hs@denx.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "MGSUVD";
compatible = "keymile,mgsuvd";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,852@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <16>;
i-cache-line-size = <16>;
d-cache-size = <8192>;
i-cache-size = <8192>;
timebase-frequency = <0>; /* Filled in by u-boot */
bus-frequency = <0>; /* Filled in by u-boot */
clock-frequency = <0>; /* Filled in by u-boot */
interrupts = <15 2>; /* decrementer interrupt */
interrupt-parent = <&PIC>;
};
};
memory {
device_type = "memory";
reg = <00000000 0x4000000>; /* Filled in by u-boot */
};
localbus@fff00100 {
compatible = "fsl,mpc852-localbus", "fsl,pq1-localbus", "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0xfff00100 0x40>;
ranges = <0 0 0xf0000000 0x01000000>; /* Filled in by u-boot */
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x1000000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <1>;
device-width = <1>;
partition@0 {
label = "u-boot";
reg = <0 0x80000>;
};
partition@80000 {
label = "env";
reg = <0x80000 0x20000>;
};
partition@a0000 {
label = "kernel";
reg = <0xa0000 0x1e0000>;
};
partition@280000 {
label = "dtb";
reg = <0x280000 0x20000>;
};
partition@2a0000 {
label = "root";
reg = <0x2a0000 0x500000>;
};
partition@7a0000 {
label = "user";
reg = <0x7a0000 0x860000>;
};
};
};
soc@fff00000 {
compatible = "fsl,mpc852", "fsl,pq1-soc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0 0xfff00000 0x00004000>;
PIC: interrupt-controller@0 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0 24>;
compatible = "fsl,mpc852-pic", "fsl,pq1-pic";
};
cpm@9c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc852-cpm", "fsl,cpm1", "simple-bus";
interrupts = <0>; /* cpm error interrupt */
interrupt-parent = <&CPM_PIC>;
reg = <0x9c0 10>;
ranges;
muram@2000 {
compatible = "fsl,cpm-muram";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x2000 0x2000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0x800 0x1800>;
};
};
brg@9f0 {
compatible = "fsl,mpc852-brg",
"fsl,cpm1-brg",
"fsl,cpm-brg";
reg = <0x9f0 0x10>;
clock-frequency = <0>; /* Filled in by u-boot */
};
CPM_PIC: interrupt-controller@930 {
interrupt-controller;
#interrupt-cells = <1>;
interrupts = <5 2 0 2>;
interrupt-parent = <&PIC>;
reg = <0x930 0x20>;
compatible = "fsl,cpm1-pic";
};
/* MON-1 */
serial@a80 {
device_type = "serial";
compatible = "fsl,cpm1-smc-uart";
reg = <0xa80 0x10 0x3fc0 0x40>;
interrupts = <4>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <1>;
fsl,cpm-command = <0x0090>;
current-speed = <0>; /* Filled in by u-boot */
};
ethernet@a40 {
device_type = "network";
compatible = "fsl,mpc866-scc-enet",
"fsl,cpm1-scc-enet";
reg = <0xa40 0x18 0x3e00 0x100>;
local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by u-boot */
interrupts = <28>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-command = <0x80>;
fixed-link = <0 0 10 0 0>;
};
};
};
};

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@@ -52,9 +52,26 @@
reg = <0x00000000 0x10000000>;
};
bcsr@f8000000 {
device_type = "board-control";
reg = <0xf8000000 0x8000>;
localbus@e0005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
"simple-bus";
reg = <0xe0005000 0xd8>;
ranges = <0 0 0xfe000000 0x02000000
1 0 0xf8000000 0x00008000>;
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x2000000>;
bank-width = <2>;
device-width = <1>;
};
bcsr@1,0 {
device_type = "board-control";
reg = <1 0 0x8000>;
};
};
soc8360@e0000000 {

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@@ -207,7 +207,7 @@
reg = <0xe4000 0x100>;
};
i2s@16000 {
ssi@16000 {
compatible = "fsl,mpc8610-ssi";
cell-index = <0>;
reg = <0x16000 0x100>;
@@ -215,6 +215,8 @@
interrupts = <62 2>;
fsl,mode = "i2s-slave";
codec-handle = <&cs4270>;
fsl,playback-dma = <&dma00>;
fsl,capture-dma = <&dma01>;
};
ssi@16100 {
@@ -233,7 +235,7 @@
reg = <0x21300 0x4>; /* DMA general status register */
ranges = <0x0 0x21100 0x200>;
dma-channel@0 {
dma00: dma-channel@0 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,eloplus-dma-channel";
cell-index = <0>;
@@ -241,7 +243,7 @@
interrupt-parent = <&mpic>;
interrupts = <20 2>;
};
dma-channel@1 {
dma01: dma-channel@1 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,eloplus-dma-channel";
cell-index = <1>;