MIPS: math-emu: Add mfhc1 & mthc1 support.
This patch adds support for the mfhc1 & mthc1 instructions to the FPU emulator. These instructions were introduced in release 2 of the MIPS32 & MIPS64 architectures and allow access to the most significant 32 bits of a 64-bit FP register. [ralf@linux-mips.org: Fix ifdef hell added by original patch.] Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6112/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle

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7e22e91102
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@@ -98,8 +98,9 @@ enum rt_op {
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*/
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enum cop_op {
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mfc_op = 0x00, dmfc_op = 0x01,
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cfc_op = 0x02, mtc_op = 0x04,
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dmtc_op = 0x05, ctc_op = 0x06,
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cfc_op = 0x02, mfhc_op = 0x03,
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mtc_op = 0x04, dmtc_op = 0x05,
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ctc_op = 0x06, mthc_op = 0x07,
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bc_op = 0x08, cop_op = 0x10,
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copm_op = 0x18
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};
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