Oprofile Multiplexing Patch
This patch introduces multiplexing support for the Oprofile kernel module. It basically adds a new function pointer in oprofile_operator allowing each architecture to supply its callback to switch between different sets of event when the timer expires. Userspace tools can modify the time slice through /dev/oprofile/time_slice. It also modifies the number of counters exposed to the userspace through /dev/oprofile. For example, the number of counters for AMD CPUs are changed to 32 and multiplexed in the sets of 4. Signed-off-by: Jason Yeh <jason.yeh@amd.com> Signed-off-by: Robert Richter <robert.richter@amd.com> Cc: oprofile-list <oprofile-list@lists.sourceforge.net> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@@ -23,12 +23,18 @@
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#include "op_counter.h"
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#include "op_x86_model.h"
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DEFINE_PER_CPU(int, switch_index);
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static struct op_x86_model_spec const *model;
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static DEFINE_PER_CPU(struct op_msrs, cpu_msrs);
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static DEFINE_PER_CPU(unsigned long, saved_lvtpc);
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static int nmi_start(void);
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static void nmi_stop(void);
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static void nmi_cpu_save_mpx_registers(struct op_msrs *msrs);
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static void nmi_cpu_restore_mpx_registers(struct op_msrs *msrs);
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static void nmi_cpu_stop(void *dummy);
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static void nmi_cpu_start(void *dummy);
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/* 0 == registered but off, 1 == registered and on */
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static int nmi_enabled = 0;
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@@ -81,6 +87,47 @@ static void exit_sysfs(void)
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#define exit_sysfs() do { } while (0)
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#endif /* CONFIG_PM */
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static void nmi_cpu_switch(void *dummy)
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{
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int cpu = smp_processor_id();
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int si = per_cpu(switch_index, cpu);
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struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
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nmi_cpu_stop(NULL);
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nmi_cpu_save_mpx_registers(msrs);
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/* move to next set */
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si += model->num_hardware_counters;
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if ((si > model->num_counters) || (counter_config[si].count == 0))
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per_cpu(switch_index, smp_processor_id()) = 0;
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else
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per_cpu(switch_index, smp_processor_id()) = si;
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nmi_cpu_restore_mpx_registers(msrs);
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model->setup_ctrs(msrs);
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nmi_cpu_start(NULL);
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}
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/*
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* Quick check to see if multiplexing is necessary.
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* The check should be sufficient since counters are used
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* in ordre.
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*/
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static int nmi_multiplex_on(void)
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{
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return counter_config[model->num_hardware_counters].count ? 0 : -EINVAL;
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}
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static int nmi_switch_event(void)
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{
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if (nmi_multiplex_on() < 0)
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return -EINVAL;
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on_each_cpu(nmi_cpu_switch, NULL, 0, 1);
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return 0;
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}
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static int profile_exceptions_notify(struct notifier_block *self,
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unsigned long val, void *data)
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{
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@@ -144,11 +191,10 @@ static void free_msrs(void)
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static int allocate_msrs(void)
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{
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int success = 1;
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int i, success = 1;
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size_t controls_size = sizeof(struct op_msr) * model->num_controls;
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size_t counters_size = sizeof(struct op_msr) * model->num_counters;
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int i;
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for_each_possible_cpu(i) {
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per_cpu(cpu_msrs, i).counters = kmalloc(counters_size,
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GFP_KERNEL);
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@@ -156,8 +202,8 @@ static int allocate_msrs(void)
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success = 0;
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break;
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}
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per_cpu(cpu_msrs, i).controls = kmalloc(controls_size,
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GFP_KERNEL);
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per_cpu(cpu_msrs, i).controls =
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kmalloc(controls_size, GFP_KERNEL);
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if (!per_cpu(cpu_msrs, i).controls) {
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success = 0;
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break;
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@@ -201,7 +247,8 @@ static int nmi_setup(void)
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return err;
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}
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/* We need to serialize save and setup for HT because the subset
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/*
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* We need to serialize save and setup for HT because the subset
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* of msrs are distinct for save and setup operations
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*/
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@@ -217,7 +264,6 @@ static int nmi_setup(void)
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per_cpu(cpu_msrs, 0).controls,
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sizeof(struct op_msr) * model->num_controls);
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}
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}
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on_each_cpu(nmi_save_registers, NULL, 1);
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on_each_cpu(nmi_cpu_setup, NULL, 1);
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@@ -225,7 +271,41 @@ static int nmi_setup(void)
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return 0;
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}
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static void nmi_restore_registers(struct op_msrs *msrs)
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static void nmi_cpu_save_mpx_registers(struct op_msrs *msrs)
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{
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unsigned int si = __get_cpu_var(switch_index);
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unsigned int const nr_ctrs = model->num_hardware_counters;
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struct op_msr *counters = &msrs->counters[si];
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unsigned int i;
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for (i = 0; i < nr_ctrs; ++i) {
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int offset = i + si;
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if (counters[offset].addr) {
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rdmsr(counters[offset].addr,
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counters[offset].multiplex.low,
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counters[offset].multiplex.high);
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}
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}
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}
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static void nmi_cpu_restore_mpx_registers(struct op_msrs *msrs)
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{
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unsigned int si = __get_cpu_var(switch_index);
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unsigned int const nr_ctrs = model->num_hardware_counters;
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struct op_msr *counters = &msrs->counters[si];
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unsigned int i;
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for (i = 0; i < nr_ctrs; ++i) {
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int offset = i + si;
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if (counters[offset].addr) {
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wrmsr(counters[offset].addr,
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counters[offset].multiplex.low,
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counters[offset].multiplex.high);
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}
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}
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}
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static void nmi_cpu_restore_registers(struct op_msrs *msrs)
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{
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unsigned int const nr_ctrs = model->num_counters;
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unsigned int const nr_ctrls = model->num_controls;
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@@ -265,7 +345,8 @@ static void nmi_cpu_shutdown(void *dummy)
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apic_write(APIC_LVTERR, v | APIC_LVT_MASKED);
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apic_write(APIC_LVTPC, per_cpu(saved_lvtpc, cpu));
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apic_write(APIC_LVTERR, v);
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nmi_restore_registers(msrs);
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nmi_cpu_restore_registers(msrs);
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__get_cpu_var(switch_index) = 0;
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}
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static void nmi_shutdown(void)
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@@ -328,6 +409,7 @@ static int nmi_create_files(struct super_block *sb, struct dentry *root)
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oprofilefs_create_ulong(sb, dir, "unit_mask", &counter_config[i].unit_mask);
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oprofilefs_create_ulong(sb, dir, "kernel", &counter_config[i].kernel);
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oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user);
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counter_config[i].save_count_low = 0;
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}
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return 0;
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@@ -469,12 +551,14 @@ int __init op_nmi_init(struct oprofile_operations *ops)
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}
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/* default values, can be overwritten by model */
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__get_cpu_var(switch_index) = 0;
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ops->create_files = nmi_create_files;
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ops->setup = nmi_setup;
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ops->shutdown = nmi_shutdown;
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ops->start = nmi_start;
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ops->stop = nmi_stop;
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ops->cpu_type = cpu_type;
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ops->switch_events = nmi_switch_event;
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if (model->init)
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ret = model->init(ops);
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