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ARM: l2c: fix register naming

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We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess.  Split them out
into those which are L2C-310 specific and ones which refer to earlier
devices.  Provide full auxiliary control register definitions.

Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
2014-03-16 20:52:25 +00:00
parent a8875a092a
commit 1a5a954ce0
14 changed files with 118 additions and 95 deletions
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8
arch/arm/mach-tegra/sleep.h
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@@ -134,13 +134,13 @@
tst \tmp3, #L2X0_CTRL_EN
bne exit_l2_resume
ldr \tmp3, [\tmp1, #L2X0_R_TAG_LATENCY]
str \tmp3, [\tmp2, #L2X0_TAG_LATENCY_CTRL]
str \tmp3, [\tmp2, #L310_TAG_LATENCY_CTRL]
ldr \tmp3, [\tmp1, #L2X0_R_DATA_LATENCY]
str \tmp3, [\tmp2, #L2X0_DATA_LATENCY_CTRL]
str \tmp3, [\tmp2, #L310_DATA_LATENCY_CTRL]
ldr \tmp3, [\tmp1, #L2X0_R_PREFETCH_CTRL]
str \tmp3, [\tmp2, #L2X0_PREFETCH_CTRL]
str \tmp3, [\tmp2, #L310_PREFETCH_CTRL]
ldr \tmp3, [\tmp1, #L2X0_R_PWR_CTRL]
str \tmp3, [\tmp2, #L2X0_POWER_CTRL]
str \tmp3, [\tmp2, #L310_POWER_CTRL]
ldr \tmp3, [\tmp1, #L2X0_R_AUX_CTRL]
str \tmp3, [\tmp2, #L2X0_AUX_CTRL]
mov \tmp3, #L2X0_CTRL_EN