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percpu: align percpu readmostly subsection to cacheline

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Currently percpu readmostly subsection may share cachelines with other
percpu subsections which may result in unnecessary cacheline bounce
and performance degradation.

This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()
linker macros, makes each arch linker scripts specify its cacheline
size and use it to align percpu subsections.

This is based on Shaohua's x86 only patch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Shaohua Li <shaohua.li@intel.com>
This commit is contained in:
Tejun Heo
2011-01-25 14:26:50 +01:00
parent c723fdab8a
commit 19df0c2fef
19 changed files with 41 additions and 32 deletions
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2
arch/powerpc/kernel/vmlinux.lds.S
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@@ -160,7 +160,7 @@ SECTIONS
INIT_RAM_FS
}
PERCPU(PAGE_SIZE)
PERCPU(L1_CACHE_BYTES, PAGE_SIZE)
. = ALIGN(8);
.machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {