Merge tag 'powerpc-5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
"Notable changes:
- Removal of the NPU DMA code, used by the out-of-tree Nvidia driver,
as well as some other functions only used by drivers that haven't
(yet?) made it upstream.
- A fix for a bug in our handling of hardware watchpoints (eg. perf
record -e mem: ...) which could lead to register corruption and
kernel crashes.
- Enable HAVE_ARCH_HUGE_VMAP, which allows us to use large pages for
vmalloc when using the Radix MMU.
- A large but incremental rewrite of our exception handling code to
use gas macros rather than multiple levels of nested CPP macros.
And the usual small fixes, cleanups and improvements.
Thanks to: Alastair D'Silva, Alexey Kardashevskiy, Andreas Schwab,
Aneesh Kumar K.V, Anju T Sudhakar, Anton Blanchard, Arnd Bergmann,
Athira Rajeev, Cédric Le Goater, Christian Lamparter, Christophe
Leroy, Christophe Lombard, Christoph Hellwig, Daniel Axtens, Denis
Efremov, Enrico Weigelt, Frederic Barrat, Gautham R. Shenoy, Geert
Uytterhoeven, Geliang Tang, Gen Zhang, Greg Kroah-Hartman, Greg Kurz,
Gustavo Romero, Krzysztof Kozlowski, Madhavan Srinivasan, Masahiro
Yamada, Mathieu Malaterre, Michael Neuling, Nathan Lynch, Naveen N.
Rao, Nicholas Piggin, Nishad Kamdar, Oliver O'Halloran, Qian Cai, Ravi
Bangoria, Sachin Sant, Sam Bobroff, Satheesh Rajendran, Segher
Boessenkool, Shaokun Zhang, Shawn Anastasio, Stewart Smith, Suraj
Jitindar Singh, Thiago Jung Bauermann, YueHaibing"
* tag 'powerpc-5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (163 commits)
powerpc/powernv/idle: Fix restore of SPRN_LDBAR for POWER9 stop state.
powerpc/eeh: Handle hugepages in ioremap space
ocxl: Update for AFU descriptor template version 1.1
powerpc/boot: pass CONFIG options in a simpler and more robust way
powerpc/boot: add {get, put}_unaligned_be32 to xz_config.h
powerpc/irq: Don't WARN continuously in arch_local_irq_restore()
powerpc/module64: Use symbolic instructions names.
powerpc/module32: Use symbolic instructions names.
powerpc: Move PPC_HA() PPC_HI() and PPC_LO() to ppc-opcode.h
powerpc/module64: Fix comment in R_PPC64_ENTRY handling
powerpc/boot: Add lzo support for uImage
powerpc/boot: Add lzma support for uImage
powerpc/boot: don't force gzipped uImage
powerpc/8xx: Add microcode patch to move SMC parameter RAM.
powerpc/8xx: Use IO accessors in microcode programming.
powerpc/8xx: replace #ifdefs by IS_ENABLED() in microcode.c
powerpc/8xx: refactor programming of microcode CPM params.
powerpc/8xx: refactor printing of microcode patch name.
powerpc/8xx: Refactor microcode write
powerpc/8xx: refactor writing of CPM microcode arrays
...
This commit is contained in:
Linus Torvalds
@@ -34,7 +34,6 @@
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#include "powernv.h"
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#include "pci.h"
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static DEFINE_MUTEX(p2p_mutex);
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static DEFINE_MUTEX(tunnel_mutex);
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int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id)
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@@ -857,79 +856,6 @@ void pnv_pci_dma_bus_setup(struct pci_bus *bus)
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}
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}
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int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target, u64 desc)
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{
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struct pci_controller *hose;
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struct pnv_phb *phb_init, *phb_target;
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struct pnv_ioda_pe *pe_init;
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int rc;
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if (!opal_check_token(OPAL_PCI_SET_P2P))
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return -ENXIO;
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hose = pci_bus_to_host(initiator->bus);
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phb_init = hose->private_data;
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hose = pci_bus_to_host(target->bus);
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phb_target = hose->private_data;
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pe_init = pnv_ioda_get_pe(initiator);
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if (!pe_init)
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return -ENODEV;
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/*
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* Configuring the initiator's PHB requires to adjust its
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* TVE#1 setting. Since the same device can be an initiator
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* several times for different target devices, we need to keep
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* a reference count to know when we can restore the default
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* bypass setting on its TVE#1 when disabling. Opal is not
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* tracking PE states, so we add a reference count on the PE
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* in linux.
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*
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* For the target, the configuration is per PHB, so we keep a
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* target reference count on the PHB.
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*/
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mutex_lock(&p2p_mutex);
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if (desc & OPAL_PCI_P2P_ENABLE) {
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/* always go to opal to validate the configuration */
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rc = opal_pci_set_p2p(phb_init->opal_id, phb_target->opal_id,
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desc, pe_init->pe_number);
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if (rc != OPAL_SUCCESS) {
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rc = -EIO;
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goto out;
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}
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pe_init->p2p_initiator_count++;
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phb_target->p2p_target_count++;
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} else {
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if (!pe_init->p2p_initiator_count ||
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!phb_target->p2p_target_count) {
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rc = -EINVAL;
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goto out;
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}
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if (--pe_init->p2p_initiator_count == 0)
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pnv_pci_ioda2_set_bypass(pe_init, true);
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if (--phb_target->p2p_target_count == 0) {
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rc = opal_pci_set_p2p(phb_init->opal_id,
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phb_target->opal_id, desc,
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pe_init->pe_number);
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if (rc != OPAL_SUCCESS) {
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rc = -EIO;
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goto out;
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}
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}
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}
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rc = 0;
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out:
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mutex_unlock(&p2p_mutex);
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return rc;
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}
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EXPORT_SYMBOL_GPL(pnv_pci_set_p2p);
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struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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@@ -938,54 +864,6 @@ struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
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}
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EXPORT_SYMBOL(pnv_pci_get_phb_node);
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int pnv_pci_enable_tunnel(struct pci_dev *dev, u64 *asnind)
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{
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struct device_node *np;
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const __be32 *prop;
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struct pnv_ioda_pe *pe;
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uint16_t window_id;
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int rc;
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if (!radix_enabled())
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return -ENXIO;
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if (!(np = pnv_pci_get_phb_node(dev)))
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return -ENXIO;
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prop = of_get_property(np, "ibm,phb-indications", NULL);
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of_node_put(np);
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if (!prop || !prop[1])
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return -ENXIO;
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*asnind = (u64)be32_to_cpu(prop[1]);
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pe = pnv_ioda_get_pe(dev);
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if (!pe)
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return -ENODEV;
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/* Increase real window size to accept as_notify messages. */
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window_id = (pe->pe_number << 1 ) + 1;
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rc = opal_pci_map_pe_dma_window_real(pe->phb->opal_id, pe->pe_number,
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window_id, pe->tce_bypass_base,
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(uint64_t)1 << 48);
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return opal_error_code(rc);
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}
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EXPORT_SYMBOL_GPL(pnv_pci_enable_tunnel);
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int pnv_pci_disable_tunnel(struct pci_dev *dev)
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{
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struct pnv_ioda_pe *pe;
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pe = pnv_ioda_get_pe(dev);
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if (!pe)
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return -ENODEV;
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/* Restore default real window size. */
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pnv_pci_ioda2_set_bypass(pe, true);
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return 0;
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}
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EXPORT_SYMBOL_GPL(pnv_pci_disable_tunnel);
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int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)
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{
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__be64 val;
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@@ -1040,29 +918,6 @@ out:
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}
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EXPORT_SYMBOL_GPL(pnv_pci_set_tunnel_bar);
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#ifdef CONFIG_PPC64 /* for thread.tidr */
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int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid, u32 *pid,
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u32 *tid)
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{
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struct mm_struct *mm = NULL;
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if (task == NULL)
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return -EINVAL;
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mm = get_task_mm(task);
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if (mm == NULL)
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return -EINVAL;
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*pid = mm->context.id;
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mmput(mm);
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*tid = task->thread.tidr;
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*lpid = mfspr(SPRN_LPID);
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return 0;
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}
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EXPORT_SYMBOL_GPL(pnv_pci_get_as_notify_info);
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#endif
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void pnv_pci_shutdown(void)
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{
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struct pci_controller *hose;
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