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drm/amdgpu: Enable DISABLE_BARRIER_WAITCNT for Arcturus

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In previous gfx9 parts, S_BARRIER shader instructions are implicitly
S_WAITCNT 0 instructions as well. This setting turns off that
mechanism in Arcturus and beyond. With this, shaders must follow the
ISA guide insofar as putting in explicit S_WAITCNT operations even
after an S_BARRIER.

v2: Fix patch title to list component

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Joseph Greathouse
2020-01-27 16:08:11 -06:00
committed by Alex Deucher
parent 269a0bf79b
commit 18c6b74e7c
2 changed files with 21 additions and 2 deletions
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6
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
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@@ -2060,7 +2060,8 @@
// addressBlock: gc_sqdec
//SQ_CONFIG
#define SQ_CONFIG__UNUSED__SHIFT 0x0
#define SQ_CONFIG__DISABLE_BARRIER_WAITCNT__SHIFT 0x0
#define SQ_CONFIG__UNUSED__SHIFT 0x1
#define SQ_CONFIG__OVERRIDE_ALU_BUSY__SHIFT 0x7
#define SQ_CONFIG__DEBUG_EN__SHIFT 0x8
#define SQ_CONFIG__DEBUG_SINGLE_MEMOP__SHIFT 0x9
@@ -2079,7 +2080,8 @@
#define SQ_CONFIG__DISABLE_SP_REDUNDANT_THREAD_GATING__SHIFT 0x1d
#define SQ_CONFIG__DISABLE_FLAT_SOFT_CLAUSE__SHIFT 0x1e
#define SQ_CONFIG__DISABLE_MIMG_SOFT_CLAUSE__SHIFT 0x1f
#define SQ_CONFIG__UNUSED_MASK 0x0000007FL
#define SQ_CONFIG__DISABLE_BARRIER_WAITCNT_MASK 0x00000001L
#define SQ_CONFIG__UNUSED_MASK 0x0000007EL
#define SQ_CONFIG__OVERRIDE_ALU_BUSY_MASK 0x00000080L
#define SQ_CONFIG__DEBUG_EN_MASK 0x00000100L
#define SQ_CONFIG__DEBUG_SINGLE_MEMOP_MASK 0x00000200L