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Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

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xdp_umem.c had overlapping changes between the 64-bit math fix
for the calculation of npgs and the removal of the zerocopy
memory type which got rid of the chunk_size_nohdr member.

The mlx5 Kconfig conflict is a case where we just take the
net-next copy of the Kconfig entry dependency as it takes on
the ESWITCH dependency by one level of indirection which is
what the 'net' conflicting change is trying to ensure.

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
2020-05-31 17:48:46 -07:00
parent 1079a34c56 bdc48fa11e
commit 1806c13dc2
173 changed files with 1495 additions and 834 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/compressed/vmlinux.lds.S
View File

@@ -42,7 +42,7 @@ SECTIONS
}
.table : ALIGN(4) {
_table_start = .;
LONG(ZIMAGE_MAGIC(2))
LONG(ZIMAGE_MAGIC(4))
LONG(ZIMAGE_MAGIC(0x5a534c4b))
LONG(ZIMAGE_MAGIC(__piggy_size_addr - _start))
LONG(ZIMAGE_MAGIC(_kernel_bss_size))

2
arch/arm/boot/dts/am437x-gp-evm.dts
View File

@@ -943,7 +943,7 @@
&cpsw_emac0 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
};
&elm {

2
arch/arm/boot/dts/am437x-idk-evm.dts
View File

@@ -504,7 +504,7 @@
&cpsw_emac0 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
};
&rtc {

4
arch/arm/boot/dts/am437x-sk-evm.dts
View File

@@ -833,13 +833,13 @@
&cpsw_emac0 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <2>;
};

4
arch/arm/boot/dts/am571x-idk.dts
View File

@@ -190,13 +190,13 @@
&cpsw_port1 {
phy-handle = <&ethphy0_sw>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
ti,dual-emac-pvid = <1>;
};
&cpsw_port2 {
phy-handle = <&ethphy1_sw>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
ti,dual-emac-pvid = <2>;
};

4
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
View File

@@ -433,13 +433,13 @@
&cpsw_emac0 {
phy-handle = <&phy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <2>;
};

4
arch/arm/boot/dts/am57xx-idk-common.dtsi
View File

@@ -408,13 +408,13 @@
&cpsw_emac0 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <2>;
};

6
arch/arm/boot/dts/bcm-hr2.dtsi
View File

@@ -75,7 +75,7 @@
timer@20200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x20200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
clocks = <&periph_clk>;
};
@@ -83,7 +83,7 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0x20600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
IRQ_TYPE_LEVEL_HIGH)>;
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};
@@ -91,7 +91,7 @@
compatible = "arm,cortex-a9-twd-wdt";
reg = <0x20620 0x20>;
interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
IRQ_TYPE_LEVEL_HIGH)>;
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};

2
arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
View File

@@ -24,7 +24,7 @@
leds {
act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
};
};

2
arch/arm/boot/dts/dm814x.dtsi
View File

@@ -693,7 +693,7 @@
davinci_mdio: mdio@800 {
compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
clocks = <&cpsw_125mhz_gclk>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <0>;

7
arch/arm/boot/dts/imx6q-b450v3.dts
View File

@@ -65,13 +65,6 @@
};
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
&ldb {
status = "okay";

7
arch/arm/boot/dts/imx6q-b650v3.dts
View File

@@ -65,13 +65,6 @@
};
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
&ldb {
status = "okay";

11
arch/arm/boot/dts/imx6q-b850v3.dts
View File

@@ -53,17 +53,6 @@
};
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
<&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
<&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
<&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
};
&ldb {
fsl,dual-channel;
status = "okay";

15
arch/arm/boot/dts/imx6q-bx50v3.dtsi
View File

@@ -377,3 +377,18 @@
#interrupt-cells = <1>;
};
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>,
<&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>,
<&clks IMX6QDL_CLK_IPU2_DI1_PRE_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
<&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
<&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
<&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
<&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
<&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
};

12
arch/arm/boot/dts/mmp3-dell-ariel.dts
View File

@@ -98,19 +98,19 @@
status = "okay";
};
&ssp3 {
&ssp1 {
status = "okay";
cs-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
firmware-flash@0 {
compatible = "st,m25p80", "jedec,spi-nor";
compatible = "winbond,w25q32", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
spi-max-frequency = <104000000>;
m25p,fast-read;
};
};
&ssp4 {
cs-gpios = <&gpio 56 GPIO_ACTIVE_HIGH>;
&ssp2 {
cs-gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
status = "okay";
};

8
arch/arm/boot/dts/mmp3.dtsi
View File

@@ -202,8 +202,7 @@
};
hsic_phy0: hsic-phy@f0001800 {
compatible = "marvell,mmp3-hsic-phy",
"usb-nop-xceiv";
compatible = "marvell,mmp3-hsic-phy";
reg = <0xf0001800 0x40>;
#phy-cells = <0>;
status = "disabled";
@@ -224,8 +223,7 @@
};
hsic_phy1: hsic-phy@f0002800 {
compatible = "marvell,mmp3-hsic-phy",
"usb-nop-xceiv";
compatible = "marvell,mmp3-hsic-phy";
reg = <0xf0002800 0x40>;
#phy-cells = <0>;
status = "disabled";
@@ -531,7 +529,7 @@
};
soc_clocks: clocks@d4050000 {
compatible = "marvell,mmp2-clock";
compatible = "marvell,mmp3-clock";
reg = <0xd4050000 0x1000>,
<0xd4282800 0x400>,
<0xd4015000 0x1000>;