rsi: reset device changes for 9116
Device reset register(watchdog timer related) addresses and values are different for 9116. Signed-off-by: Siva Rebbagondla <siva8118@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Kalle Valo

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@@ -70,6 +70,21 @@
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#define RSI_WATCH_DOG_DELAY_TIMER_2 0x16f
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#define RSI_WATCH_DOG_TIMER_ENABLE 0x170
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/* Watchdog timer addresses for 9116 */
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#define NWP_AHB_BASE_ADDR 0x41300000
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#define NWP_WWD_INTERRUPT_TIMER (NWP_AHB_BASE_ADDR + 0x300)
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#define NWP_WWD_SYSTEM_RESET_TIMER (NWP_AHB_BASE_ADDR + 0x304)
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#define NWP_WWD_WINDOW_TIMER (NWP_AHB_BASE_ADDR + 0x308)
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#define NWP_WWD_TIMER_SETTINGS (NWP_AHB_BASE_ADDR + 0x30C)
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#define NWP_WWD_MODE_AND_RSTART (NWP_AHB_BASE_ADDR + 0x310)
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#define NWP_WWD_RESET_BYPASS (NWP_AHB_BASE_ADDR + 0x314)
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#define NWP_FSM_INTR_MASK_REG (NWP_AHB_BASE_ADDR + 0x104)
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/* Watchdog timer values */
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#define NWP_WWD_INT_TIMER_CLKS 5
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#define NWP_WWD_SYS_RESET_TIMER_CLKS 4
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#define NWP_WWD_TIMER_DISABLE 0xAA0001
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#define RSI_ULP_WRITE_0 00
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#define RSI_ULP_WRITE_2 02
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#define RSI_ULP_WRITE_50 50
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