rsi: reset device changes for 9116

Device reset register(watchdog timer related) addresses and
values are different for 9116.

Signed-off-by: Siva Rebbagondla <siva8118@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Siva Rebbagondla
2019-04-03 09:43:08 +05:30
committad av Kalle Valo
förälder 1533f976c6
incheckning 17ff2c794f
3 ändrade filer med 91 tillägg och 30 borttagningar

Visa fil

@@ -70,6 +70,21 @@
#define RSI_WATCH_DOG_DELAY_TIMER_2 0x16f
#define RSI_WATCH_DOG_TIMER_ENABLE 0x170
/* Watchdog timer addresses for 9116 */
#define NWP_AHB_BASE_ADDR 0x41300000
#define NWP_WWD_INTERRUPT_TIMER (NWP_AHB_BASE_ADDR + 0x300)
#define NWP_WWD_SYSTEM_RESET_TIMER (NWP_AHB_BASE_ADDR + 0x304)
#define NWP_WWD_WINDOW_TIMER (NWP_AHB_BASE_ADDR + 0x308)
#define NWP_WWD_TIMER_SETTINGS (NWP_AHB_BASE_ADDR + 0x30C)
#define NWP_WWD_MODE_AND_RSTART (NWP_AHB_BASE_ADDR + 0x310)
#define NWP_WWD_RESET_BYPASS (NWP_AHB_BASE_ADDR + 0x314)
#define NWP_FSM_INTR_MASK_REG (NWP_AHB_BASE_ADDR + 0x104)
/* Watchdog timer values */
#define NWP_WWD_INT_TIMER_CLKS 5
#define NWP_WWD_SYS_RESET_TIMER_CLKS 4
#define NWP_WWD_TIMER_DISABLE 0xAA0001
#define RSI_ULP_WRITE_0 00
#define RSI_ULP_WRITE_2 02
#define RSI_ULP_WRITE_50 50