Merge tag 'mmc-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson: "MMC core: - Add support to enable irq wake for slot gpio - Remove MMC_CAP2_HC_ERASE_SZ and make it the default behaviour - Improve R1 response error checks for stop commands - Cleanup and clarify some MMC specific code - Keep card runtime resumed while adding SDIO function devices - Use device_property_read instead of of_property_read in mmc_of_parse() - Move boot partition locking into a driver op to enable proper I/O scheduling - Move multi/single-ioctl() to use block layer to enable proper I/O scheduling - Delete bounce buffer Kconfig option - Improve the eMMC HW reset support provided via the eMMC pwrseq - Add host API to manage SDIO IRQs from a workqueue MMC host: - dw_mmc: Drop support for multiple slots - dw_mmc: Use device_property_read instead of of_property_read - dw_mmc-rockchip: Optional improved tuning to greatly decrease tuning time - dw_mmc: Prevent rpm suspend for SDIO IRQs instead of always for SDIO cards - dw_mmc: Convert to use MMC_CAP2_SDIO_IRQ_NOTHREAD for SDIO IRQs - omap_hsmmc: Convert to mmc regulator APIs to consolidate code - omap_hsmmc: Deprecate "vmmc_aux" in DT and use "vqmmc" instead - tmio: make sure SDIO gets reinitialized after resume - sdhi: add CMD23 support to R-Car Gen2 & Gen3 - tmio: add CMD23 support - sdhi/tmio: Refactor code and rename files to simplify Kconfig options - sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers - sdhci-pci: Add support for Intel CNP - sdhci-esdhc-imx: Remove ENGcm07207 workaround - allow multi block transfers - sdhci-esdhc-imx: Allow all supported prescaler values - sdhci-esdhc-imx: Fix DAT line software reset - sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR - atmel-mci: Drop AVR32 support" * tag 'mmc-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (86 commits) mmc: dw_mmc: remove the unnecessary slot variable mmc: dw_mmc: use the 'slot' instead of 'cur_slot' mmc: dw_mmc: remove the 'id' arguments about functions relevant to slot mmc: dw_mmc: change the array of slots mmc: dw_mmc: remove the loop about finding slots mmc: dw_mmc: deprecated the "num-slots" property mmc: dw_mmc-rockchip: parse rockchip, desired-num-phases from DT dt-bindings: rockchip-dw-mshc: add optional rockchip, desired-num-phases mmc: renesas-sdhi: improve checkpatch cleanness mmc: tmio: improve checkpatch cleanness mmc: sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers mmc: slot-gpio: Add support to enable irq wake on cd_irq mmc: core: Remove MMC_CAP2_HC_ERASE_SZ mmc: core: for data errors, take response of stop cmd into account mmc: core: check also R1 response for stop commands mmc: core: Clarify code for sending CSD mmc: core: Drop mmc_all_send_cid() and use mmc_send_cxd_native() instead mmc: core: Re-factor code for sending CID mmc: core: Remove redundant code in mmc_send_cid() mmc: core: Make mmc_can_reset() static ...
This commit is contained in:
@@ -13,15 +13,15 @@
|
||||
#define tmio_ioread16(addr) readw(addr)
|
||||
#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
|
||||
#define tmio_ioread32(addr) \
|
||||
(((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
|
||||
(((u32)readw((addr))) | (((u32)readw((addr) + 2)) << 16))
|
||||
|
||||
#define tmio_iowrite8(val, addr) writeb((val), (addr))
|
||||
#define tmio_iowrite16(val, addr) writew((val), (addr))
|
||||
#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
|
||||
#define tmio_iowrite32(val, addr) \
|
||||
do { \
|
||||
writew((val), (addr)); \
|
||||
writew((val) >> 16, (addr) + 2); \
|
||||
writew((val), (addr)); \
|
||||
writew((val) >> 16, (addr) + 2); \
|
||||
} while (0)
|
||||
|
||||
#define CNF_CMD 0x04
|
||||
@@ -55,57 +55,57 @@
|
||||
} while (0)
|
||||
|
||||
/* tmio MMC platform flags */
|
||||
#define TMIO_MMC_WRPROTECT_DISABLE (1 << 0)
|
||||
#define TMIO_MMC_WRPROTECT_DISABLE BIT(0)
|
||||
/*
|
||||
* Some controllers can support a 2-byte block size when the bus width
|
||||
* is configured in 4-bit mode.
|
||||
*/
|
||||
#define TMIO_MMC_BLKSZ_2BYTES (1 << 1)
|
||||
#define TMIO_MMC_BLKSZ_2BYTES BIT(1)
|
||||
/*
|
||||
* Some controllers can support SDIO IRQ signalling.
|
||||
*/
|
||||
#define TMIO_MMC_SDIO_IRQ (1 << 2)
|
||||
#define TMIO_MMC_SDIO_IRQ BIT(2)
|
||||
|
||||
/* Some features are only available or tested on RCar Gen2 or later */
|
||||
#define TMIO_MMC_MIN_RCAR2 (1 << 3)
|
||||
/* Some features are only available or tested on R-Car Gen2 or later */
|
||||
#define TMIO_MMC_MIN_RCAR2 BIT(3)
|
||||
|
||||
/*
|
||||
* Some controllers require waiting for the SD bus to become
|
||||
* idle before writing to some registers.
|
||||
*/
|
||||
#define TMIO_MMC_HAS_IDLE_WAIT (1 << 4)
|
||||
#define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
|
||||
/*
|
||||
* A GPIO is used for card hotplug detection. We need an extra flag for this,
|
||||
* because 0 is a valid GPIO number too, and requiring users to specify
|
||||
* cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility.
|
||||
*/
|
||||
#define TMIO_MMC_USE_GPIO_CD (1 << 5)
|
||||
#define TMIO_MMC_USE_GPIO_CD BIT(5)
|
||||
|
||||
/*
|
||||
* Some controllers doesn't have over 0x100 register.
|
||||
* it is used to checking accessibility of
|
||||
* CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL
|
||||
*/
|
||||
#define TMIO_MMC_HAVE_HIGH_REG (1 << 6)
|
||||
#define TMIO_MMC_HAVE_HIGH_REG BIT(6)
|
||||
|
||||
/*
|
||||
* Some controllers have CMD12 automatically
|
||||
* issue/non-issue register
|
||||
*/
|
||||
#define TMIO_MMC_HAVE_CMD12_CTRL (1 << 7)
|
||||
#define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
|
||||
|
||||
/* Controller has some SDIO status bits which must be 1 */
|
||||
#define TMIO_MMC_SDIO_STATUS_SETBITS (1 << 8)
|
||||
#define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
|
||||
|
||||
/*
|
||||
* Some controllers have a 32-bit wide data port register
|
||||
*/
|
||||
#define TMIO_MMC_32BIT_DATA_PORT (1 << 9)
|
||||
#define TMIO_MMC_32BIT_DATA_PORT BIT(9)
|
||||
|
||||
/*
|
||||
* Some controllers allows to set SDx actual clock
|
||||
*/
|
||||
#define TMIO_MMC_CLK_ACTUAL (1 << 10)
|
||||
#define TMIO_MMC_CLK_ACTUAL BIT(10)
|
||||
|
||||
int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
|
||||
int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
|
||||
@@ -146,9 +146,9 @@ struct tmio_nand_data {
|
||||
|
||||
struct tmio_fb_data {
|
||||
int (*lcd_set_power)(struct platform_device *fb_dev,
|
||||
bool on);
|
||||
bool on);
|
||||
int (*lcd_mode)(struct platform_device *fb_dev,
|
||||
const struct fb_videomode *mode);
|
||||
const struct fb_videomode *mode);
|
||||
int num_modes;
|
||||
struct fb_videomode *modes;
|
||||
|
||||
@@ -157,5 +157,4 @@ struct tmio_fb_data {
|
||||
int width;
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
|
Reference in New Issue
Block a user