Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner: "This updated pull request does not contain the last few GIC related patches which were reported to cause a regression. There is a fix available, but I let it breed for a couple of days first. The irq departement provides: - new infrastructure to support non PCI based MSI interrupts - a couple of new irq chip drivers - the usual pile of fixlets and updates to irq chip drivers - preparatory changes for removal of the irq argument from interrupt flow handlers - preparatory changes to remove IRQF_VALID" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits) irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2 irqchip: Add documentation for the bcm2836 interrupt controller irqchip/bcm2835: Add support for being used as a second level controller irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ PCI: xilinx: Fix typo in function name irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance irqchip/gic: Only allow the primary GIC to set the CPU map PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove unicore32/irq: Prepare puv3_gpio_handler for irq argument removal tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal m68k/irq: Prepare irq handlers for irq argument removal C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal blackfin: Prepare irq handlers for irq argument removal arc/irq: Prepare idu_cascade_isr for irq argument removal sparc/irq: Use access helper irq_data_get_affinity_mask() sparc/irq: Use helper irq_data_get_irq_handler_data() parisc/irq: Use access helper irq_data_get_affinity_mask() mn10300/irq: Use access helper irq_data_get_affinity_mask() irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal ...
This commit is contained in:
@@ -123,7 +123,8 @@ cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
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}
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static int
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cpld_pic_host_match(struct irq_domain *h, struct device_node *node)
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cpld_pic_host_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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return cpld_pic_node == node;
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}
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@@ -213,7 +213,7 @@ static int setup_msi_msg_address(struct pci_dev *dev, struct msi_msg *msg)
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return -ENODEV;
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}
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entry = list_first_entry(&dev->msi_list, struct msi_desc, list);
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entry = first_pci_msi_entry(dev);
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for (; dn; dn = of_get_next_parent(dn)) {
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if (entry->msi_attrib.is_64) {
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@@ -269,7 +269,7 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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if (rc)
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return rc;
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list_for_each_entry(entry, &dev->msi_list, list) {
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for_each_pci_msi_entry(entry, dev) {
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virq = irq_create_direct_mapping(msic->irq_domain);
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if (virq == NO_IRQ) {
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dev_warn(&dev->dev,
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@@ -292,7 +292,7 @@ static void axon_msi_teardown_msi_irqs(struct pci_dev *dev)
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dev_dbg(&dev->dev, "axon_msi: tearing down msi irqs\n");
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list_for_each_entry(entry, &dev->msi_list, list) {
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for_each_pci_msi_entry(entry, dev) {
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if (entry->irq == NO_IRQ)
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continue;
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@@ -222,7 +222,8 @@ void iic_request_IPIs(void)
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#endif /* CONFIG_SMP */
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static int iic_host_match(struct irq_domain *h, struct device_node *node)
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static int iic_host_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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return of_device_is_compatible(node,
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"IBM,CBEA-Internal-Interrupt-Controller");
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@@ -108,7 +108,8 @@ static int flipper_pic_map(struct irq_domain *h, unsigned int virq,
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return 0;
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}
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static int flipper_pic_match(struct irq_domain *h, struct device_node *np)
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static int flipper_pic_match(struct irq_domain *h, struct device_node *np,
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enum irq_domain_bus_token bus_token)
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{
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return 1;
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}
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@@ -66,7 +66,7 @@ static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
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pr_debug("pasemi_msi_teardown_msi_irqs, pdev %p\n", pdev);
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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if (entry->irq == NO_IRQ)
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continue;
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@@ -94,7 +94,7 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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msg.address_hi = 0;
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msg.address_lo = PASEMI_MSI_ADDR;
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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/* Allocate 16 interrupts for now, since that's the grouping for
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* affinity. This can be changed later if it turns out 32 is too
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* few MSIs for someone, but restrictions will apply to how the
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@@ -268,7 +268,8 @@ static struct irqaction gatwick_cascade_action = {
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.name = "cascade",
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};
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static int pmac_pic_host_match(struct irq_domain *h, struct device_node *node)
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static int pmac_pic_host_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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/* We match all, we don't always have a node anyway */
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return 1;
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@@ -134,7 +134,8 @@ static void opal_handle_irq_work(struct irq_work *work)
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opal_handle_events(be64_to_cpu(last_outstanding_events));
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}
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static int opal_event_match(struct irq_domain *h, struct device_node *node)
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static int opal_event_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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return h->of_node == node;
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}
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@@ -61,7 +61,7 @@ int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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if (pdev->no_64bit_msi && !phb->msi32_support)
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return -ENODEV;
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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if (!entry->msi_attrib.is_64 && !phb->msi32_support) {
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pr_warn("%s: Supports only 64-bit MSIs\n",
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pci_name(pdev));
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@@ -103,7 +103,7 @@ void pnv_teardown_msi_irqs(struct pci_dev *pdev)
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if (WARN_ON(!phb))
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return;
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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if (entry->irq == NO_IRQ)
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continue;
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irq_set_msi_desc(entry->irq, NULL);
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@@ -678,7 +678,8 @@ static int ps3_host_map(struct irq_domain *h, unsigned int virq,
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return 0;
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}
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static int ps3_host_match(struct irq_domain *h, struct device_node *np)
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static int ps3_host_match(struct irq_domain *h, struct device_node *np,
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enum irq_domain_bus_token bus_token)
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{
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/* Match all */
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return 1;
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@@ -118,7 +118,7 @@ static void rtas_teardown_msi_irqs(struct pci_dev *pdev)
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{
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struct msi_desc *entry;
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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if (entry->irq == NO_IRQ)
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continue;
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@@ -350,7 +350,7 @@ static int check_msix_entries(struct pci_dev *pdev)
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* So we must reject such requests. */
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expected = 0;
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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if (entry->msi_attrib.entry_nr != expected) {
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pr_debug("rtas_msi: bad MSI-X entries.\n");
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return -EINVAL;
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@@ -462,7 +462,7 @@ again:
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}
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i = 0;
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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hwirq = rtas_query_irq_number(pdn, i++);
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if (hwirq < 0) {
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pr_debug("rtas_msi: error (%d) getting hwirq\n", rc);
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@@ -177,7 +177,8 @@ unsigned int ehv_pic_get_irq(void)
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return irq_linear_revmap(global_ehv_pic->irqhost, irq);
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}
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static int ehv_pic_host_match(struct irq_domain *h, struct device_node *node)
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static int ehv_pic_host_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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/* Exact match, unless ehv_pic node is NULL */
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return h->of_node == NULL || h->of_node == node;
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@@ -129,7 +129,7 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
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struct msi_desc *entry;
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struct fsl_msi *msi_data;
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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if (entry->irq == NO_IRQ)
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continue;
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msi_data = irq_get_chip_data(entry->irq);
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@@ -219,7 +219,7 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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}
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}
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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/*
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* Loop over all the MSI devices until we find one that has an
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* available interrupt.
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@@ -162,7 +162,8 @@ static struct resource pic_edgectrl_iores = {
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.flags = IORESOURCE_BUSY,
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};
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static int i8259_host_match(struct irq_domain *h, struct device_node *node)
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static int i8259_host_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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return h->of_node == NULL || h->of_node == node;
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}
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@@ -671,7 +671,8 @@ static struct irq_chip ipic_edge_irq_chip = {
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.irq_set_type = ipic_set_irq_type,
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};
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static int ipic_host_match(struct irq_domain *h, struct device_node *node)
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static int ipic_host_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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/* Exact match, unless ipic node is NULL */
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return h->of_node == NULL || h->of_node == node;
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@@ -1007,7 +1007,8 @@ static struct irq_chip mpic_irq_ht_chip = {
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#endif /* CONFIG_MPIC_U3_HT_IRQS */
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static int mpic_host_match(struct irq_domain *h, struct device_node *node)
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static int mpic_host_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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/* Exact match, unless mpic node is NULL */
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return h->of_node == NULL || h->of_node == node;
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@@ -108,7 +108,7 @@ static void u3msi_teardown_msi_irqs(struct pci_dev *pdev)
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{
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struct msi_desc *entry;
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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if (entry->irq == NO_IRQ)
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continue;
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@@ -140,7 +140,7 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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return -ENXIO;
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}
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list_for_each_entry(entry, &pdev->msi_list, list) {
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for_each_pci_msi_entry(entry, pdev) {
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hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1);
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if (hwirq < 0) {
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pr_debug("u3msi: failed allocating hwirq\n");
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@@ -51,7 +51,7 @@ static int hsta_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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return -EINVAL;
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}
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list_for_each_entry(entry, &dev->msi_list, list) {
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for_each_pci_msi_entry(entry, dev) {
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irq = msi_bitmap_alloc_hwirqs(&ppc4xx_hsta_msi.bmp, 1);
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if (irq < 0) {
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pr_debug("%s: Failed to allocate msi interrupt\n",
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@@ -109,7 +109,7 @@ static void hsta_teardown_msi_irqs(struct pci_dev *dev)
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struct msi_desc *entry;
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int irq;
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list_for_each_entry(entry, &dev->msi_list, list) {
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for_each_pci_msi_entry(entry, dev) {
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if (entry->irq == NO_IRQ)
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continue;
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@@ -93,7 +93,7 @@ static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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if (!msi_data->msi_virqs)
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return -ENOMEM;
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list_for_each_entry(entry, &dev->msi_list, list) {
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for_each_pci_msi_entry(entry, dev) {
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int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
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if (int_no >= 0)
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break;
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@@ -127,7 +127,7 @@ void ppc4xx_teardown_msi_irqs(struct pci_dev *dev)
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dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n");
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list_for_each_entry(entry, &dev->msi_list, list) {
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for_each_pci_msi_entry(entry, dev) {
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if (entry->irq == NO_IRQ)
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continue;
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irq_set_msi_desc(entry->irq, NULL);
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@@ -244,7 +244,8 @@ static struct irq_chip qe_ic_irq_chip = {
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.irq_mask_ack = qe_ic_mask_irq,
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};
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static int qe_ic_host_match(struct irq_domain *h, struct device_node *node)
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static int qe_ic_host_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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/* Exact match, unless qe_ic node is NULL */
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return h->of_node == NULL || h->of_node == node;
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@@ -72,7 +72,7 @@ static unsigned int ics_opal_startup(struct irq_data *d)
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* card, using the MSI mask bits. Firmware doesn't appear to unmask
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* at that level, so we do it here by hand.
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*/
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if (d->msi_desc)
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if (irq_data_get_msi_desc(d))
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pci_msi_unmask_irq(d);
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#endif
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@@ -75,7 +75,7 @@ static unsigned int ics_rtas_startup(struct irq_data *d)
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* card, using the MSI mask bits. Firmware doesn't appear to unmask
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* at that level, so we do it here by hand.
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*/
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if (d->msi_desc)
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if (irq_data_get_msi_desc(d))
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pci_msi_unmask_irq(d);
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#endif
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/* unmask it */
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@@ -298,7 +298,8 @@ int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
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}
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#endif /* CONFIG_SMP */
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static int xics_host_match(struct irq_domain *h, struct device_node *node)
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static int xics_host_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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struct ics *ics;
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