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MIPS: Loongson1B: use common clock infrastructure instead of private APIs

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Use common clock infrastructure instead of private APIs.
1. Enable COMMON_CLK in the Kconfig.
2. Remove private clock APIs, which are replaced by the code in
   drivers/clk/clk-ls1x.c.
3. Modify header file for drivers/clk/clk-ls1x.c.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4431
Signed-off-by: John Crispin <blogic@openwrt.org>
This commit is contained in:
Kelvin Cheung
2012-10-23 05:17:00 +00:00
committed by John Crispin
parent ed21cfe207
commit 17ded0a89b
4 changed files with 8 additions and 159 deletions
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1
arch/mips/include/asm/mach-loongson1/platform.h
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@@ -18,6 +18,7 @@ extern struct platform_device ls1x_eth0_device;
extern struct platform_device ls1x_ehci_device;
extern struct platform_device ls1x_rtc_device;
extern void __init ls1x_clk_init(void);
void ls1x_serial_setup(void);
#endif /* __ASM_MACH_LOONGSON1_PLATFORM_H */

7
arch/mips/include/asm/mach-loongson1/regs-clk.h
View File

@@ -20,14 +20,15 @@
/* Clock PLL Divisor Register Bits */
#define DIV_DC_EN (0x1 << 31)
#define DIV_DC (0x1f << 26)
#define DIV_CPU_EN (0x1 << 25)
#define DIV_CPU (0x1f << 20)
#define DIV_DDR_EN (0x1 << 19)
#define DIV_DDR (0x1f << 14)
#define DIV_DC_SHIFT 26
#define DIV_CPU_SHIFT 20
#define DIV_DDR_SHIFT 14
#define DIV_DC_WIDTH 5
#define DIV_CPU_WIDTH 5
#define DIV_DDR_WIDTH 5
#endif /* __ASM_MACH_LOONGSON1_REGS_CLK_H */