ath9k: Remove all the sc_ prefixes
This patch removes the useless sc_ prefixes for all variables. Also, refer to interfaces as VIFs and not as VAPs anymore. Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
@@ -104,13 +104,13 @@ enum buffer_type {
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};
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struct ath_buf_state {
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int bfs_nframes; /* # frames in aggregate */
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u16 bfs_al; /* length of aggregate */
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u16 bfs_frmlen; /* length of frame */
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int bfs_seqno; /* sequence number */
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int bfs_tidno; /* tid of this frame */
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int bfs_retries; /* current retries */
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u32 bf_type; /* BUF_* (enum buffer_type) */
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int bfs_nframes;
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u16 bfs_al;
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u16 bfs_frmlen;
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int bfs_seqno;
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int bfs_tidno;
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int bfs_retries;
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u32 bf_type;
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u32 bfs_keyix;
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enum ath9k_key_type bfs_keytype;
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};
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@@ -129,10 +129,6 @@ struct ath_buf_state {
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#define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
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#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
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/*
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* Abstraction of a contiguous buffer to transmit/receive. There is only
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* a single hw descriptor encapsulated here.
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*/
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struct ath_buf {
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struct list_head list;
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struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
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@@ -143,22 +139,20 @@ struct ath_buf {
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dma_addr_t bf_daddr; /* physical addr of desc */
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dma_addr_t bf_buf_addr; /* physical addr of data buffer */
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u32 bf_status;
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u16 bf_flags; /* tx descriptor flags */
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struct ath_buf_state bf_state; /* buffer state */
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u16 bf_flags;
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struct ath_buf_state bf_state;
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dma_addr_t bf_dmacontext;
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};
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#define ATH_RXBUF_RESET(_bf) ((_bf)->bf_status = 0)
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#define ATH_BUFSTATUS_STALE 0x00000002
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/* DMA state for tx/rx descriptors */
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struct ath_descdma {
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const char *dd_name;
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struct ath_desc *dd_desc; /* descriptors */
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dma_addr_t dd_desc_paddr; /* physical addr of dd_desc */
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u32 dd_desc_len; /* size of dd_desc */
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struct ath_buf *dd_bufptr; /* associated buffers */
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struct ath_desc *dd_desc;
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dma_addr_t dd_desc_paddr;
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u32 dd_desc_len;
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struct ath_buf *dd_bufptr;
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dma_addr_t dd_dmacontext;
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};
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@@ -246,15 +240,15 @@ enum ATH_AGGR_STATUS {
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};
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struct ath_txq {
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u32 axq_qnum; /* hardware q number */
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u32 *axq_link; /* link ptr in last TX desc */
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struct list_head axq_q; /* transmit queue */
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u32 axq_qnum;
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u32 *axq_link;
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struct list_head axq_q;
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spinlock_t axq_lock;
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u32 axq_depth; /* queue depth */
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u8 axq_aggr_depth; /* aggregates queued */
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u32 axq_totalqueued; /* total ever queued */
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bool stopped; /* Is mac80211 queue stopped ? */
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struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/
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u32 axq_depth;
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u8 axq_aggr_depth;
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u32 axq_totalqueued;
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bool stopped;
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struct ath_buf *axq_linkbuf;
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/* first desc of the last descriptor that contains CTS */
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struct ath_desc *axq_lastdsWithCTS;
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@@ -270,45 +264,39 @@ struct ath_txq {
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#define AGGR_ADDBA_COMPLETE BIT(2)
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#define AGGR_ADDBA_PROGRESS BIT(3)
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/* per TID aggregate tx state for a destination */
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struct ath_atx_tid {
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struct list_head list; /* round-robin tid entry */
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struct list_head buf_q; /* pending buffers */
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struct list_head list;
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struct list_head buf_q;
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struct ath_node *an;
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struct ath_atx_ac *ac;
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struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; /* active tx frames */
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struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];
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u16 seq_start;
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u16 seq_next;
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u16 baw_size;
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int tidno;
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int baw_head; /* first un-acked tx buffer */
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int baw_tail; /* next unused tx buffer slot */
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int baw_head; /* first un-acked tx buffer */
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int baw_tail; /* next unused tx buffer slot */
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int sched;
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int paused;
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u8 state;
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int addba_exchangeattempts;
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};
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/* per access-category aggregate tx state for a destination */
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struct ath_atx_ac {
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int sched; /* dest-ac is scheduled */
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int qnum; /* H/W queue number associated
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with this AC */
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struct list_head list; /* round-robin txq entry */
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struct list_head tid_q; /* queue of TIDs with buffers */
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int sched;
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int qnum;
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struct list_head list;
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struct list_head tid_q;
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};
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/* per-frame tx control block */
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struct ath_tx_control {
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struct ath_txq *txq;
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int if_id;
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};
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/* per frame tx status block */
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struct ath_xmit_status {
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int retries; /* number of retries to successufully
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transmit this frame */
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int flags; /* status of transmit */
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int retries;
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int flags;
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#define ATH_TX_ERROR 0x01
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#define ATH_TX_XRETRY 0x02
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#define ATH_TX_BAR 0x04
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@@ -396,21 +384,21 @@ int ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
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void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
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/********/
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/* VAPs */
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/* VIFs */
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/********/
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/*
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* Define the scheme that we select MAC address for multiple
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* BSS on the same radio. The very first VAP will just use the MAC
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* address from the EEPROM. For the next 3 VAPs, we set the
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* BSS on the same radio. The very first VIF will just use the MAC
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* address from the EEPROM. For the next 3 VIFs, we set the
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* U/L bit (bit 1) in MAC address, and use the next two bits as the
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* index of the VAP.
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* index of the VIF.
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*/
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#define ATH_SET_VAP_BSSID_MASK(bssid_mask) \
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#define ATH_SET_VIF_BSSID_MASK(bssid_mask) \
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((bssid_mask)[0] &= ~(((ATH_BCBUF-1)<<2)|0x02))
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struct ath_vap {
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struct ath_vif {
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int av_bslot;
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enum nl80211_iftype av_opmode;
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struct ath_buf *av_bcbuf;
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@@ -469,7 +457,7 @@ void ath9k_beacon_tasklet(unsigned long data);
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void ath_beacon_config(struct ath_softc *sc, int if_id);
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int ath_beaconq_setup(struct ath_hal *ah);
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int ath_beacon_alloc(struct ath_softc *sc, int if_id);
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void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp);
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void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
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void ath_beacon_sync(struct ath_softc *sc, int if_id);
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/*******/
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@@ -485,12 +473,12 @@ void ath_beacon_sync(struct ath_softc *sc, int if_id);
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#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes between calibrations */
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struct ath_ani {
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bool sc_caldone;
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int16_t sc_noise_floor;
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unsigned int sc_longcal_timer;
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unsigned int sc_shortcal_timer;
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unsigned int sc_resetcal_timer;
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unsigned int sc_checkani_timer;
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bool caldone;
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int16_t noise_floor;
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unsigned int longcal_timer;
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unsigned int shortcal_timer;
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unsigned int resetcal_timer;
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unsigned int checkani_timer;
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struct timer_list timer;
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};
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@@ -591,31 +579,31 @@ struct ath_softc {
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spinlock_t sc_resetlock;
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struct mutex mutex;
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u8 sc_curbssid[ETH_ALEN];
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u8 sc_myaddr[ETH_ALEN];
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u8 sc_bssidmask[ETH_ALEN];
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u32 sc_intrstatus;
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u8 curbssid[ETH_ALEN];
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u8 macaddr[ETH_ALEN];
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u8 bssidmask[ETH_ALEN];
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u32 intrstatus;
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u32 sc_flags; /* SC_OP_* */
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u16 sc_curtxpow;
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u16 sc_curaid;
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u16 sc_cachelsz;
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u8 sc_nbcnvaps;
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u16 sc_nvaps;
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u8 sc_tx_chainmask;
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u8 sc_rx_chainmask;
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u32 sc_keymax;
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DECLARE_BITMAP(sc_keymap, ATH_KEYMAX);
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u8 sc_splitmic;
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u16 curtxpow;
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u16 curaid;
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u16 cachelsz;
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u8 nbcnvifs;
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u16 nvifs;
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u8 tx_chainmask;
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u8 rx_chainmask;
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u32 keymax;
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DECLARE_BITMAP(keymap, ATH_KEYMAX);
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u8 splitmic;
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atomic_t ps_usecount;
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enum ath9k_int sc_imask;
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enum ath9k_ht_extprotspacing sc_ht_extprotspacing;
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enum ath9k_int imask;
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enum ath9k_ht_extprotspacing ht_extprotspacing;
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enum ath9k_ht_macmode tx_chan_width;
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struct ath_config sc_config;
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struct ath_config config;
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struct ath_rx rx;
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struct ath_tx tx;
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struct ath_beacon beacon;
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struct ieee80211_vif *sc_vaps[ATH_BCBUF];
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struct ieee80211_vif *vifs[ATH_BCBUF];
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struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
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struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];
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struct ath_rate_table *cur_rate_table;
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@@ -632,10 +620,10 @@ struct ath_softc {
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int led_off_cnt;
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struct ath_rfkill rf_kill;
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struct ath_ani sc_ani;
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struct ath9k_node_stats sc_halstats;
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struct ath_ani ani;
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struct ath9k_node_stats nodestats;
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#ifdef CONFIG_ATH9K_DEBUG
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struct ath9k_debug sc_debug;
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struct ath9k_debug debug;
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#endif
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struct ath_bus_ops *bus_ops;
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};
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