sfc: Add support for sub-10G speeds
The SFC4000 has a separate MAC for use at sub-10G speeds. Introduce an efx_mac_operations structure with implementations for the two MACs. Switch between the MACs as necessary. PHY settings are independent of the MAC, so add get_settings() and set_settings() to efx_phy_operations. Also add macs field to indicate which MACs the PHY is connected to. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ben Hutchings
committed by
David S. Miller
David S. Miller
parent
356eebb2b3
commit
177dfcd80f
@@ -25,24 +25,6 @@
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* MAC operations
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*
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*************************************************************************/
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static int falcon_reset_xmac(struct efx_nic *efx)
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{
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efx_oword_t reg;
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int count;
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EFX_POPULATE_OWORD_1(reg, XM_CORE_RST, 1);
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falcon_write(efx, ®, XM_GLB_CFG_REG);
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for (count = 0; count < 10000; count++) { /* wait upto 100ms */
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falcon_read(efx, ®, XM_GLB_CFG_REG);
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if (EFX_OWORD_FIELD(reg, XM_CORE_RST) == 0)
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return 0;
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udelay(10);
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}
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EFX_ERR(efx, "timed out waiting for XMAC core reset\n");
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return -ETIMEDOUT;
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}
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/* Configure the XAUI driver that is an output from Falcon */
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static void falcon_setup_xaui(struct efx_nic *efx)
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@@ -98,31 +80,20 @@ int falcon_reset_xaui(struct efx_nic *efx)
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return -ETIMEDOUT;
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}
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static bool falcon_xgmii_status(struct efx_nic *efx)
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{
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efx_oword_t reg;
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if (falcon_rev(efx) < FALCON_REV_B0)
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return true;
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/* The ISR latches, so clear it and re-read */
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falcon_read(efx, ®, XM_MGT_INT_REG_B0);
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falcon_read(efx, ®, XM_MGT_INT_REG_B0);
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if (EFX_OWORD_FIELD(reg, XM_LCLFLT) ||
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EFX_OWORD_FIELD(reg, XM_RMTFLT)) {
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EFX_INFO(efx, "MGT_INT: "EFX_DWORD_FMT"\n", EFX_DWORD_VAL(reg));
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return false;
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}
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return true;
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}
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static void falcon_mask_status_intr(struct efx_nic *efx, bool enable)
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{
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efx_oword_t reg;
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if ((falcon_rev(efx) < FALCON_REV_B0) || LOOPBACK_INTERNAL(efx))
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if ((falcon_rev(efx) != FALCON_REV_B0) || LOOPBACK_INTERNAL(efx))
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return;
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/* We expect xgmii faults if the wireside link is up */
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if (!EFX_WORKAROUND_5147(efx) || !efx->link_up)
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return;
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/* We can only use this interrupt to signal the negative edge of
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* xaui_align [we have to poll the positive edge]. */
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if (!efx->mac_up)
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return;
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/* Flush the ISR */
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@@ -135,35 +106,7 @@ static void falcon_mask_status_intr(struct efx_nic *efx, bool enable)
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falcon_write(efx, ®, XM_MGT_INT_MSK_REG_B0);
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}
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int falcon_init_xmac(struct efx_nic *efx)
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{
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int rc;
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/* Initialize the PHY first so the clock is around */
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rc = efx->phy_op->init(efx);
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if (rc)
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goto fail1;
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rc = falcon_reset_xaui(efx);
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if (rc)
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goto fail2;
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/* Wait again. Give the PHY and MAC time to come back */
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schedule_timeout_uninterruptible(HZ / 10);
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rc = falcon_reset_xmac(efx);
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if (rc)
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goto fail2;
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falcon_mask_status_intr(efx, true);
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return 0;
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fail2:
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efx->phy_op->fini(efx);
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fail1:
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return rc;
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}
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/* Get status of XAUI link */
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bool falcon_xaui_link_ok(struct efx_nic *efx)
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{
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efx_oword_t reg;
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@@ -187,18 +130,10 @@ bool falcon_xaui_link_ok(struct efx_nic *efx)
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EFX_SET_OWORD_FIELD(reg, XX_DISPERR, XX_DISPERR_RESET);
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falcon_write(efx, ®, XX_CORE_STAT_REG);
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/* If the link is up, then check the phy side of the xaui link
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* (error conditions from the wire side propoagate back through
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* the phy to the xaui side). */
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if (efx->link_up && link_ok) {
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/* If the link is up, then check the phy side of the xaui link */
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if (efx->link_up && link_ok)
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if (efx->phy_op->mmds & (1 << MDIO_MMD_PHYXS))
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link_ok = mdio_clause45_phyxgxs_lane_sync(efx);
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}
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/* If the PHY and XAUI links are up, then check the mac's xgmii
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* fault state */
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if (efx->link_up && link_ok)
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link_ok = falcon_xgmii_status(efx);
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return link_ok;
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}
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@@ -310,70 +245,39 @@ static void falcon_reconfigure_xgxs_core(struct efx_nic *efx)
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/* Try and bring the Falcon side of the Falcon-Phy XAUI link fails
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* to come back up. Bash it until it comes back up */
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static bool falcon_check_xaui_link_up(struct efx_nic *efx)
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static void falcon_check_xaui_link_up(struct efx_nic *efx, int tries)
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{
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int max_tries, tries;
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tries = EFX_WORKAROUND_5147(efx) ? 5 : 1;
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max_tries = tries;
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efx->mac_up = falcon_xaui_link_ok(efx);
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if ((efx->loopback_mode == LOOPBACK_NETWORK) ||
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(efx->phy_type == PHY_TYPE_NONE) ||
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efx_phy_mode_disabled(efx->phy_mode))
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return false;
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/* XAUI link is expected to be down */
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return;
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while (tries) {
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if (falcon_xaui_link_ok(efx))
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return true;
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EFX_LOG(efx, "%s Clobbering XAUI (%d tries left).\n",
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__func__, tries);
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while (!efx->mac_up && tries) {
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EFX_LOG(efx, "bashing xaui\n");
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falcon_reset_xaui(efx);
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udelay(200);
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tries--;
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}
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EFX_LOG(efx, "Failed to bring XAUI link back up in %d tries!\n",
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max_tries);
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return false;
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efx->mac_up = falcon_xaui_link_ok(efx);
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--tries;
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}
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}
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void falcon_reconfigure_xmac(struct efx_nic *efx)
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static void falcon_reconfigure_xmac(struct efx_nic *efx)
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{
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bool xaui_link_ok;
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falcon_mask_status_intr(efx, false);
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falcon_deconfigure_mac_wrapper(efx);
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/* Reconfigure the PHY, disabling transmit in mac level loopback. */
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if (LOOPBACK_INTERNAL(efx))
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efx->phy_mode |= PHY_MODE_TX_DISABLED;
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else
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efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
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efx->phy_op->reconfigure(efx);
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falcon_reconfigure_xgxs_core(efx);
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falcon_reconfigure_xmac_core(efx);
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falcon_reconfigure_mac_wrapper(efx);
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/* Ensure XAUI link is up */
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xaui_link_ok = falcon_check_xaui_link_up(efx);
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if (xaui_link_ok && efx->link_up)
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falcon_mask_status_intr(efx, true);
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falcon_check_xaui_link_up(efx, 5);
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falcon_mask_status_intr(efx, true);
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}
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void falcon_fini_xmac(struct efx_nic *efx)
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{
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/* Isolate the MAC - PHY */
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falcon_deconfigure_mac_wrapper(efx);
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/* Potentially power down the PHY */
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efx->phy_op->fini(efx);
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}
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void falcon_update_stats_xmac(struct efx_nic *efx)
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static void falcon_update_stats_xmac(struct efx_nic *efx)
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{
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struct efx_mac_stats *mac_stats = &efx->mac_stats;
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int rc;
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@@ -438,7 +342,7 @@ void falcon_update_stats_xmac(struct efx_nic *efx)
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mac_stats->rx_control * 64);
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}
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int falcon_check_xmac(struct efx_nic *efx)
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static int falcon_check_xmac(struct efx_nic *efx)
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{
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bool xaui_link_ok;
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int rc;
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@@ -463,72 +367,8 @@ int falcon_check_xmac(struct efx_nic *efx)
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return rc;
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}
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/* Simulate a PHY event */
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void falcon_xmac_sim_phy_event(struct efx_nic *efx)
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{
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efx_qword_t phy_event;
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EFX_POPULATE_QWORD_2(phy_event,
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EV_CODE, GLOBAL_EV_DECODE,
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XG_PHY_INTR, 1);
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falcon_generate_event(&efx->channel[0], &phy_event);
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}
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int falcon_xmac_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
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{
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mdio_clause45_get_settings(efx, ecmd);
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ecmd->transceiver = XCVR_INTERNAL;
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ecmd->phy_address = efx->mii.phy_id;
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ecmd->autoneg = AUTONEG_DISABLE;
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ecmd->duplex = DUPLEX_FULL;
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return 0;
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}
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int falcon_xmac_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
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{
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if (ecmd->transceiver != XCVR_INTERNAL)
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return -EINVAL;
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if (ecmd->autoneg != AUTONEG_DISABLE)
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return -EINVAL;
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if (ecmd->duplex != DUPLEX_FULL)
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return -EINVAL;
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return mdio_clause45_set_settings(efx, ecmd);
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}
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int falcon_xmac_set_pause(struct efx_nic *efx, enum efx_fc_type flow_control)
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{
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bool reset;
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if (flow_control & EFX_FC_AUTO) {
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EFX_LOG(efx, "10G does not support flow control "
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"autonegotiation\n");
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return -EINVAL;
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}
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if ((flow_control & EFX_FC_TX) && !(flow_control & EFX_FC_RX))
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return -EINVAL;
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/* TX flow control may automatically turn itself off if the
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* link partner (intermittently) stops responding to pause
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* frames. There isn't any indication that this has happened,
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* so the best we do is leave it up to the user to spot this
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* and fix it be cycling transmit flow control on this end. */
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reset = ((flow_control & EFX_FC_TX) &&
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!(efx->flow_control & EFX_FC_TX));
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if (EFX_WORKAROUND_11482(efx) && reset) {
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if (falcon_rev(efx) >= FALCON_REV_B0) {
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/* Recover by resetting the EM block */
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if (efx->link_up)
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falcon_drain_tx_fifo(efx);
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} else {
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/* Schedule a reset to recover */
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efx_schedule_reset(efx, RESET_TYPE_INVISIBLE);
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}
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}
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efx->flow_control = flow_control;
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return 0;
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}
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struct efx_mac_operations falcon_xmac_operations = {
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.reconfigure = falcon_reconfigure_xmac,
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.update_stats = falcon_update_stats_xmac,
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.check_hw = falcon_check_xmac,
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};
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