sh: migrate SH_CLK_MD to mode pin API.
This kills off the hardcoded SH_CLK_MD introduced by the SH-2 boards and converts over to the mode pin API. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@@ -14,24 +14,18 @@
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <asm/clock.h>
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#include <asm/freq.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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static const int pll1rate[] = {1,2};
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static const int pfc_divisors[] = {1,2,0,4};
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#if (CONFIG_SH_CLK_MD == 1) || (CONFIG_SH_CLK_MD == 2)
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#define PLL2 (4)
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#elif (CONFIG_SH_CLK_MD == 5) || (CONFIG_SH_CLK_MD == 6)
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#define PLL2 (2)
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#else
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#error "Illigal Clock Mode!"
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#endif
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static unsigned int pll2_mult;
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static void master_clk_init(struct clk *clk)
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{
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clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
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clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
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}
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static struct clk_ops sh7619_master_clk_ops = {
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@@ -70,6 +64,14 @@ static struct clk_ops *sh7619_clk_ops[] = {
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void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
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{
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if (test_mode_pin(MODE_PIN2 | MODE_PIN0) ||
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test_mode_pin(MODE_PIN2 | MODE_PIN1))
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pll2_mult = 2;
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else if (test_mode_pin(MODE_PIN0) || test_mode_pin(MODE_PIN1))
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pll2_mult = 4;
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BUG_ON(!pll2_mult);
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if (idx < ARRAY_SIZE(sh7619_clk_ops))
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*ops = sh7619_clk_ops[idx];
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}
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