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Revert "MIPS: ralink: fix cpu clock of mt7621 and add dt clk devices"

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Commit e6046b5e69 ("MIPS: ralink: fix cpu clock of mt7621 and add dt
clk devices") includes a file that doesn't exist, causing build
failures... Revert it.

References: https://lore.kernel.org/linux-mips/CAJsYDVJvviz8a2oVmb0XL3OB+=Eecu-3kC9T9vsmxpuC_BqDSA@mail.gmail.com/
Signed-off-by: Paul Burton <paul.burton@mips.com>
This commit is contained in:
Paul Burton
2019-04-12 11:04:02 -07:00
parent 3e3d1dfda4
commit 16b22f85bc
3 changed files with 33 additions and 93 deletions
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20
arch/mips/include/asm/mach-ralink/mt7621.h
View File

@@ -19,10 +19,6 @@
#define SYSC_REG_CHIP_REV 0x0c
#define SYSC_REG_SYSTEM_CONFIG0 0x10
#define SYSC_REG_SYSTEM_CONFIG1 0x14
#define SYSC_REG_CLKCFG0 0x2c
#define SYSC_REG_CUR_CLK_STS 0x44
#define MEMC_REG_CPU_PLL 0x648
#define CHIP_REV_PKG_MASK 0x1
#define CHIP_REV_PKG_SHIFT 16
@@ -30,22 +26,6 @@
#define CHIP_REV_VER_SHIFT 8
#define CHIP_REV_ECO_MASK 0xf
#define XTAL_MODE_SEL_MASK 0x7
#define XTAL_MODE_SEL_SHIFT 6
#define CPU_CLK_SEL_MASK 0x3
#define CPU_CLK_SEL_SHIFT 30
#define CUR_CPU_FDIV_MASK 0x1f
#define CUR_CPU_FDIV_SHIFT 8
#define CUR_CPU_FFRAC_MASK 0x1f
#define CUR_CPU_FFRAC_SHIFT 0
#define CPU_PLL_PREDIV_MASK 0x3
#define CPU_PLL_PREDIV_SHIFT 12
#define CPU_PLL_FBDIV_MASK 0x7f
#define CPU_PLL_FBDIV_SHIFT 4
#define MT7621_DRAM_BASE 0x0
#define MT7621_DDR2_SIZE_MIN 32
#define MT7621_DDR2_SIZE_MAX 256