xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

FROMLIST: KVM: arm64: Disable FWB in host stage-2

Browse Source 
We need the host to be in control of cacheability of its own mappings,
so let's disable FWB altogether in its stage 2.

Signed-off-by: Quentin Perret <qperret@google.com>
Link: https://lore.kernel.org/r/20210317141714.383046-3-qperret@google.com
Bug: 178098380
Change-Id: Icbbae50440f10f1fba6f612ba6fe6f481ed65442
This commit is contained in:
Quentin Perret
2021-03-17 14:17:14 +00:00
parent 3a16a9e7be
commit 16982b6a18
1 changed files with 2 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm64/kvm/hyp/nvhe/mem_protect.c
View File

@@ -94,8 +94,8 @@ int kvm_host_prepare_stage2(void *mem_pgt_pool, void *dev_pgt_pool)
if (ret) if (ret)
return ret; return ret;
ret = kvm_pgtable_stage2_init(&host_kvm.pgt, &host_kvm.arch, ret = kvm_pgtable_stage2_init_flags(&host_kvm.pgt, &host_kvm.arch,
&host_kvm.mm_ops); &host_kvm.mm_ops, KVM_PGTABLE_S2_NOFWB);
if (ret) if (ret)
return ret; return ret;
@@ -116,8 +116,6 @@ int __pkvm_prot_finalize(void)
params->vttbr = kvm_get_vttbr(mmu); params->vttbr = kvm_get_vttbr(mmu);
params->vtcr = host_kvm.arch.vtcr; params->vtcr = host_kvm.arch.vtcr;
params->hcr_el2 |= HCR_VM; params->hcr_el2 |= HCR_VM;
if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
params->hcr_el2 |= HCR_FWB;
kvm_flush_dcache_to_poc(params, sizeof(*params)); kvm_flush_dcache_to_poc(params, sizeof(*params));
write_sysreg(params->hcr_el2, hcr_el2); write_sysreg(params->hcr_el2, hcr_el2);