Merge tag 'irqchip-4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Merge the first drop of irqchip updates for 4.9 from Marc Zyngier: - ACPI IORT core code - IORT support for the GICv3 ITS - A few of GIC cleanups
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@@ -39,6 +39,7 @@ struct cpumask *irq_create_affinity_mask(unsigned int *nr_vecs)
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return NULL;
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}
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get_online_cpus();
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if (max_vecs >= num_online_cpus()) {
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cpumask_copy(affinity_mask, cpu_online_mask);
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*nr_vecs = num_online_cpus();
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@@ -56,6 +57,7 @@ struct cpumask *irq_create_affinity_mask(unsigned int *nr_vecs)
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}
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*nr_vecs = vecs;
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}
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put_online_cpus();
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return affinity_mask;
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}
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@@ -829,6 +829,17 @@ __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
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desc->name = name;
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if (handle != handle_bad_irq && is_chained) {
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/*
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* We're about to start this interrupt immediately,
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* hence the need to set the trigger configuration.
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* But the .set_type callback may have overridden the
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* flow handler, ignoring that we're dealing with a
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* chained interrupt. Reset it immediately because we
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* do know better.
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*/
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__irq_set_trigger(desc, irqd_get_trigger_type(&desc->irq_data));
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desc->handle_irq = handle;
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irq_settings_set_noprobe(desc);
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irq_settings_set_norequest(desc);
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irq_settings_set_nothread(desc);
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@@ -1680,8 +1680,10 @@ int request_threaded_irq(unsigned int irq, irq_handler_t handler,
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action->dev_id = dev_id;
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retval = irq_chip_pm_get(&desc->irq_data);
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if (retval < 0)
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if (retval < 0) {
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kfree(action);
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return retval;
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}
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chip_bus_lock(desc);
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retval = __setup_irq(irq, desc, action);
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@@ -1984,8 +1986,10 @@ int request_percpu_irq(unsigned int irq, irq_handler_t handler,
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action->percpu_dev_id = dev_id;
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retval = irq_chip_pm_get(&desc->irq_data);
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if (retval < 0)
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if (retval < 0) {
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kfree(action);
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return retval;
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}
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chip_bus_lock(desc);
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retval = __setup_irq(irq, desc, action);
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@@ -359,6 +359,17 @@ int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
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else
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dev_dbg(dev, "irq [%d-%d] for MSI\n",
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virq, virq + desc->nvec_used - 1);
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/*
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* This flag is set by the PCI layer as we need to activate
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* the MSI entries before the PCI layer enables MSI in the
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* card. Otherwise the card latches a random msi message.
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*/
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if (info->flags & MSI_FLAG_ACTIVATE_EARLY) {
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struct irq_data *irq_data;
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irq_data = irq_domain_get_irq_data(domain, desc->irq);
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irq_domain_activate_irq(irq_data);
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}
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}
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return 0;
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