clk: hix5hd2: add watchdog0 clocks

hix5hd2 add watchdog0 clocks

Signed-off-by: Guoxiong Yan <yanguoxiong@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This commit is contained in:
Guoxiong Yan
2014-06-17 17:04:17 +08:00
committed by Wei Xu
parent cc855dd999
commit 1463fba39c
2 changed files with 7 additions and 0 deletions

View File

@@ -60,6 +60,8 @@
#define HIX5HD2_SD_CIU_CLK 136
#define HIX5HD2_SD_BIU_CLK 137
#define HIX5HD2_SD_CIU_RST 138
#define HIX5HD2_WDG0_CLK 139
#define HIX5HD2_WDG0_RST 140
/* complex */
#define HIX5HD2_MAC0_CLK 192