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microblaze: Introduce TLB skip size

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TLB skip size direct how many TLBs is skipped.
Currently TLB0 and TLB1 are used for Linux kernel mapping
that's why their are skipped.

Signed-off-by: Michal Simek <monstr@monstr.eu>
This commit is contained in:
Michal Simek
2011-04-04 15:46:03 +02:00
parent 95b0f9ea66
commit 1451d1d88b
3 changed files with 7 additions and 5 deletions
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4
arch/microblaze/kernel/misc.S
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@@ -36,7 +36,7 @@ _tlbia_1:
nop
mts rtlbhi, r0 /* flush: ensure V is clear */
nop
addik r11, r12, -2
addik r11, r12, -MICROBLAZE_TLB_SKIP
bneid r11, _tlbia_1 /* loop for all entries */
addik r12, r12, -1
/* sync */
@@ -75,7 +75,7 @@ early_console_reg_tlb_alloc:
* Load a TLB entry for the UART, so that microblaze_progress() can use
* the UARTs nice and early. We use a 4k real==virtual mapping.
*/
ori r4, r0, MICROBLAZE_TLB_SIZE - 1
ori r4, r0, 63
mts rtlbx, r4 /* TLB slot 63 */
or r4,r5,r0