m68knommu: move the 5307 platform code into the common ColdFire code directory
All these separate directories for each ColdFire CPU SoC varient seems like overkill. The majority of them only contain a single small config file. Move these into the common ColdFire code directory. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer
@@ -23,10 +23,13 @@ obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
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obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o
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obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
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obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o
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obj-$(CONFIG_M5307) += timers.o intc.o reset.o
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obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
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obj-$(CONFIG_M532x) += timers.o intc-simr.o reset.o
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obj-$(CONFIG_M5407) += timers.o intc.o reset.o
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obj-$(CONFIG_M54xx) += sltimers.o intc-2.o
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obj-$(CONFIG_NETtel) += nettel.o
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obj-$(CONFIG_CLEOPATRA) += nettel.o
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obj-y += pinmux.o gpio.o
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extra-y := head.o
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67
arch/m68k/platform/coldfire/m5307.c
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67
arch/m68k/platform/coldfire/m5307.c
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@@ -0,0 +1,67 @@
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/***************************************************************************/
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/*
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* linux/arch/m68knommu/platform/5307/config.c
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*
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* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2000, Lineo (www.lineo.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfgpio.h>
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#include <asm/mcfwdebug.h>
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/***************************************************************************/
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/*
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* Some platforms need software versions of the GPIO data registers.
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*/
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unsigned short ppdata;
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unsigned char ledbank = 0xff;
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/***************************************************************************/
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struct mcf_gpio_chip mcf_gpio_chips[] = {
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MCFGPS(PP, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
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};
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unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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#if defined(CONFIG_NETtel) || \
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defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
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/* Copy command line from FLASH to local buffer... */
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memcpy(commandp, (char *) 0xf0004000, size);
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commandp[size-1] = 0;
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#endif
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mach_sched_init = hw_timer_init;
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/* Only support the external interrupts on their primary level */
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mcf_mapirq2imr(25, MCFINTC_EINT1);
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mcf_mapirq2imr(27, MCFINTC_EINT3);
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mcf_mapirq2imr(29, MCFINTC_EINT5);
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mcf_mapirq2imr(31, MCFINTC_EINT7);
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#ifdef CONFIG_BDM_DISABLE
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/*
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* Disable the BDM clocking. This also turns off most of the rest of
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* the BDM device. This is good for EMC reasons. This option is not
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* incompatible with the memory protection option.
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*/
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wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
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#endif
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}
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/***************************************************************************/
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153
arch/m68k/platform/coldfire/nettel.c
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153
arch/m68k/platform/coldfire/nettel.c
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@@ -0,0 +1,153 @@
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/***************************************************************************/
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/*
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* nettel.c -- startup code support for the NETtel boards
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*
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* Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/nettel.h>
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/***************************************************************************/
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/*
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* Define the IO and interrupt resources of the 2 SMC9196 interfaces.
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*/
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#define NETTEL_SMC0_ADDR 0x30600300
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#define NETTEL_SMC0_IRQ 29
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#define NETTEL_SMC1_ADDR 0x30600000
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#define NETTEL_SMC1_IRQ 27
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/*
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* We need some access into the SMC9196 registers. Define those registers
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* we will need here (including the smc91x.h doesn't seem to give us these
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* in a simple form).
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*/
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#define SMC91xx_BANKSELECT 14
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#define SMC91xx_BASEADDR 2
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#define SMC91xx_BASEMAC 4
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/***************************************************************************/
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static struct resource nettel_smc91x_0_resources[] = {
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{
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.start = NETTEL_SMC0_ADDR,
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.end = NETTEL_SMC0_ADDR + 0x20,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = NETTEL_SMC0_IRQ,
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.end = NETTEL_SMC0_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource nettel_smc91x_1_resources[] = {
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{
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.start = NETTEL_SMC1_ADDR,
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.end = NETTEL_SMC1_ADDR + 0x20,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = NETTEL_SMC1_IRQ,
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.end = NETTEL_SMC1_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device nettel_smc91x[] = {
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{
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(nettel_smc91x_0_resources),
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.resource = nettel_smc91x_0_resources,
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},
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{
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.name = "smc91x",
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.id = 1,
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.num_resources = ARRAY_SIZE(nettel_smc91x_1_resources),
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.resource = nettel_smc91x_1_resources,
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},
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};
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static struct platform_device *nettel_devices[] __initdata = {
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&nettel_smc91x[0],
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&nettel_smc91x[1],
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};
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/***************************************************************************/
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static u8 nettel_macdefault[] __initdata = {
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0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01,
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};
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/*
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* Set flash contained MAC address into SMC9196 core. Make sure the flash
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* MAC address is sane, and not an empty flash. If no good use the Moreton
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* Bay default MAC address instead.
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*/
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static void __init nettel_smc91x_setmac(unsigned int ioaddr, unsigned int flashaddr)
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{
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u16 *macp;
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macp = (u16 *) flashaddr;
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if ((macp[0] == 0xffff) && (macp[1] == 0xffff) && (macp[2] == 0xffff))
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macp = (u16 *) &nettel_macdefault[0];
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writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
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writew(macp[0], ioaddr + SMC91xx_BASEMAC);
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writew(macp[1], ioaddr + SMC91xx_BASEMAC + 2);
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writew(macp[2], ioaddr + SMC91xx_BASEMAC + 4);
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}
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/***************************************************************************/
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/*
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* Re-map the address space of at least one of the SMC ethernet
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* parts. Both parts power up decoding the same address, so we
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* need to move one of them first, before doing anything else.
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*/
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static void __init nettel_smc91x_init(void)
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{
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writew(0x00ec, MCF_MBAR + MCFSIM_PADDR);
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mcf_setppdata(0, 0x0080);
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writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
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writew(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR);
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mcf_setppdata(0x0080, 0);
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/* Set correct chip select timing for SMC9196 accesses */
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writew(0x1180, MCF_MBAR + MCFSIM_CSCR3);
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/* Set the SMC interrupts to be auto-vectored */
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mcf_autovector(NETTEL_SMC0_IRQ);
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mcf_autovector(NETTEL_SMC1_IRQ);
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/* Set MAC addresses from flash for both interfaces */
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nettel_smc91x_setmac(NETTEL_SMC0_ADDR, 0xf0006000);
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nettel_smc91x_setmac(NETTEL_SMC1_ADDR, 0xf0006006);
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}
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/***************************************************************************/
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static int __init init_nettel(void)
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{
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nettel_smc91x_init();
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platform_add_devices(nettel_devices, ARRAY_SIZE(nettel_devices));
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return 0;
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}
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arch_initcall(init_nettel);
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/***************************************************************************/
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