perf/x86/intel: Support Haswell/v4 LBR format
Haswell has two additional LBR from flags for TSX: in_tx and abort_tx, implemented as a new "v4" version of the LBR format. Handle those in and adjust the sign extension code to still correctly extend. The flags are exported similarly in the LBR record to the existing misprediction flag Signed-off-by: Andi Kleen <ak@linux.intel.com> Cc: Andi Kleen <ak@linux.jf.intel.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Link: http://lkml.kernel.org/r/1371515812-9646-6-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@@ -157,8 +157,11 @@ enum perf_branch_sample_type {
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PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */
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PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */
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PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */
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PERF_SAMPLE_BRANCH_ABORT_TX = 1U << 7, /* transaction aborts */
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PERF_SAMPLE_BRANCH_IN_TX = 1U << 8, /* in transaction */
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PERF_SAMPLE_BRANCH_NO_TX = 1U << 9, /* not in transaction */
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PERF_SAMPLE_BRANCH_MAX = 1U << 7, /* non-ABI */
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PERF_SAMPLE_BRANCH_MAX = 1U << 10, /* non-ABI */
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};
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#define PERF_SAMPLE_BRANCH_PLM_ALL \
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