[PATCH] EDAC: probe1 cleanup 1-of-2
- Add lower-level functions that handle various parts of the initialization done by the xxx_probe1() functions. Some of the xxx_probe1() functions are much too long and complicated (see "Chapter 5: Functions" in Documentation/CodingStyle). - Cleanup of probe1() functions in EDAC Signed-off-by: Doug Thompson <norsk5@xmission.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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committed by
Linus Torvalds

parent
2d7bbb91c8
commit
1318952514
@@ -205,25 +205,72 @@ static void r82600_check(struct mem_ctl_info *mci)
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r82600_process_error_info(mci, &info, 1);
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}
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static inline int ecc_enabled(u8 dramcr)
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{
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return dramcr & BIT(5);
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}
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static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
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u8 dramcr)
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{
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struct csrow_info *csrow;
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int index;
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u8 drbar; /* SDRAM Row Boundry Address Register */
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u32 row_high_limit, row_high_limit_last;
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u32 reg_sdram, ecc_on, row_base;
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ecc_on = ecc_enabled(dramcr);
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reg_sdram = dramcr & BIT(4);
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row_high_limit_last = 0;
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for (index = 0; index < mci->nr_csrows; index++) {
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csrow = &mci->csrows[index];
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/* find the DRAM Chip Select Base address and mask */
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pci_read_config_byte(pdev, R82600_DRBA + index, &drbar);
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debugf1("%s() Row=%d DRBA = %#0x\n", __func__, index, drbar);
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row_high_limit = ((u32) drbar << 24);
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/* row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
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debugf1("%s() Row=%d, Boundry Address=%#0x, Last = %#0x\n",
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__func__, index, row_high_limit, row_high_limit_last);
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/* Empty row [p.57] */
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if (row_high_limit == row_high_limit_last)
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continue;
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row_base = row_high_limit_last;
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csrow->first_page = row_base >> PAGE_SHIFT;
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csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
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csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
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/* Error address is top 19 bits - so granularity is *
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* 14 bits */
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csrow->grain = 1 << 14;
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csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR;
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/* FIXME - check that this is unknowable with this chipset */
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csrow->dtype = DEV_UNKNOWN;
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/* Mode is global on 82600 */
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csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;
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row_high_limit_last = row_high_limit;
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}
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}
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static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
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{
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int rc = -ENODEV;
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int index;
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struct mem_ctl_info *mci = NULL;
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struct mem_ctl_info *mci;
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u8 dramcr;
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u32 ecc_on;
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u32 reg_sdram;
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u32 eapr;
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u32 scrub_disabled;
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u32 sdram_refresh_rate;
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u32 row_high_limit_last = 0;
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struct r82600_error_info discard;
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debugf0("%s()\n", __func__);
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pci_read_config_byte(pdev, R82600_DRAMC, &dramcr);
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pci_read_config_dword(pdev, R82600_EAP, &eapr);
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ecc_on = dramcr & BIT(5);
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reg_sdram = dramcr & BIT(4);
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scrub_disabled = eapr & BIT(31);
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sdram_refresh_rate = dramcr & (BIT(0) | BIT(1));
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debugf2("%s(): sdram refresh rate = %#0x\n", __func__,
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@@ -231,10 +278,8 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
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debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);
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mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS);
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if (mci == NULL) {
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rc = -ENOMEM;
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goto fail;
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}
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if (mci == NULL)
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return -ENOMEM;
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debugf0("%s(): mci = %p\n", __func__, mci);
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mci->dev = &pdev->dev;
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@@ -250,7 +295,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
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* is possible. */
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mci->edac_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
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if (ecc_on) {
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if (ecc_enabled(dramcr)) {
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if (scrub_disabled)
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debugf3("%s(): mci = %p - Scrubbing disabled! EAP: "
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"%#0x\n", __func__, mci, eapr);
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@@ -262,46 +307,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
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mci->ctl_name = "R82600";
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mci->edac_check = r82600_check;
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mci->ctl_page_to_phys = NULL;
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for (index = 0; index < mci->nr_csrows; index++) {
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struct csrow_info *csrow = &mci->csrows[index];
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u8 drbar; /* sDram Row Boundry Address Register */
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u32 row_high_limit;
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u32 row_base;
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/* find the DRAM Chip Select Base address and mask */
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pci_read_config_byte(pdev, R82600_DRBA + index, &drbar);
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debugf1("MC%d: %s() Row=%d DRBA = %#0x\n", mci->mc_idx,
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__func__, index, drbar);
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row_high_limit = ((u32) drbar << 24);
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/* row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
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debugf1("MC%d: %s() Row=%d, Boundry Address=%#0x, Last = "
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"%#0x \n", mci->mc_idx, __func__, index,
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row_high_limit, row_high_limit_last);
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/* Empty row [p.57] */
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if (row_high_limit == row_high_limit_last)
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continue;
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row_base = row_high_limit_last;
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csrow->first_page = row_base >> PAGE_SHIFT;
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csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
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csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
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/* Error address is top 19 bits - so granularity is *
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* 14 bits */
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csrow->grain = 1 << 14;
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csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR;
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/* FIXME - check that this is unknowable with this chipset */
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csrow->dtype = DEV_UNKNOWN;
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/* Mode is global on 82600 */
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csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;
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row_high_limit_last = row_high_limit;
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}
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r82600_init_csrows(mci, pdev, dramcr);
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r82600_get_error_info(mci, &discard); /* clear counters */
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/* Here we assume that we will never see multiple instances of this
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@@ -324,10 +330,8 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
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return 0;
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fail:
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if (mci)
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edac_mc_free(mci);
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return rc;
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edac_mc_free(mci);
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return -ENODEV;
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}
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/* returns count (>= 0), or negative on error */
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