[PATCH] EDAC: probe1 cleanup 1-of-2
- Add lower-level functions that handle various parts of the initialization done by the xxx_probe1() functions. Some of the xxx_probe1() functions are much too long and complicated (see "Chapter 5: Functions" in Documentation/CodingStyle). - Cleanup of probe1() functions in EDAC Signed-off-by: Doug Thompson <norsk5@xmission.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Doug Thompson
کامیت شده توسط
Linus Torvalds
Linus Torvalds
والد
2d7bbb91c8
کامیت
1318952514
@@ -265,81 +265,147 @@ static void i82875p_check(struct mem_ctl_info *mci)
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extern int pci_proc_attach_device(struct pci_dev *);
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#endif
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static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
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/* Return 0 on success or 1 on failure. */
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static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
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struct pci_dev **ovrfl_pdev, void __iomem **ovrfl_window)
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{
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int rc = -ENODEV;
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int index;
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struct mem_ctl_info *mci = NULL;
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struct i82875p_pvt *pvt = NULL;
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unsigned long last_cumul_size;
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struct pci_dev *ovrfl_pdev;
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void __iomem *ovrfl_window = NULL;
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u32 drc;
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u32 drc_chan; /* Number of channels 0=1chan,1=2chan */
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u32 nr_chans;
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u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
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struct i82875p_error_info discard;
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struct pci_dev *dev;
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void __iomem *window;
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debugf0("%s()\n", __func__);
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ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
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*ovrfl_pdev = NULL;
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*ovrfl_window = NULL;
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dev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
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if (!ovrfl_pdev) {
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/*
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* Intel tells BIOS developers to hide device 6 which
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if (dev == NULL) {
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/* Intel tells BIOS developers to hide device 6 which
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* configures the overflow device access containing
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* the DRBs - this is where we expose device 6.
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* http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htm
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*/
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pci_write_bits8(pdev, 0xf4, 0x2, 0x2);
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ovrfl_pdev =
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pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
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dev = pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
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if (!ovrfl_pdev)
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return -ENODEV;
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if (dev == NULL)
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return 1;
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}
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*ovrfl_pdev = dev;
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#ifdef CONFIG_PROC_FS
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if (!ovrfl_pdev->procent && pci_proc_attach_device(ovrfl_pdev)) {
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i82875p_printk(KERN_ERR,
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"%s(): Failed to attach overflow device\n", __func__);
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return -ENODEV;
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if ((dev->procent == NULL) && pci_proc_attach_device(dev)) {
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i82875p_printk(KERN_ERR, "%s(): Failed to attach overflow "
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"device\n", __func__);
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return 1;
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}
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#endif
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/* CONFIG_PROC_FS */
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if (pci_enable_device(ovrfl_pdev)) {
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i82875p_printk(KERN_ERR,
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"%s(): Failed to enable overflow device\n", __func__);
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return -ENODEV;
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#endif /* CONFIG_PROC_FS */
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if (pci_enable_device(dev)) {
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i82875p_printk(KERN_ERR, "%s(): Failed to enable overflow "
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"device\n", __func__);
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return 1;
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}
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if (pci_request_regions(ovrfl_pdev, pci_name(ovrfl_pdev))) {
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if (pci_request_regions(dev, pci_name(dev))) {
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#ifdef CORRECT_BIOS
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goto fail0;
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#endif
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}
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/* cache is irrelevant for PCI bus reads/writes */
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ovrfl_window = ioremap_nocache(pci_resource_start(ovrfl_pdev, 0),
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pci_resource_len(ovrfl_pdev, 0));
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window = ioremap_nocache(pci_resource_start(dev, 0),
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pci_resource_len(dev, 0));
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if (!ovrfl_window) {
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if (window == NULL) {
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i82875p_printk(KERN_ERR, "%s(): Failed to ioremap bar6\n",
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__func__);
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__func__);
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goto fail1;
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}
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/* need to find out the number of channels */
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drc = readl(ovrfl_window + I82875P_DRC);
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drc_chan = ((drc >> 21) & 0x1);
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nr_chans = drc_chan + 1;
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*ovrfl_window = window;
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return 0;
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fail1:
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pci_release_regions(dev);
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#ifdef CORRECT_BIOS
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fail0:
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pci_disable_device(dev);
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#endif
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/* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
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return 1;
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}
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/* Return 1 if dual channel mode is active. Else return 0. */
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static inline int dual_channel_active(u32 drc)
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{
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return (drc >> 21) & 0x1;
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}
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static void i82875p_init_csrows(struct mem_ctl_info *mci,
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struct pci_dev *pdev, void __iomem *ovrfl_window, u32 drc)
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{
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struct csrow_info *csrow;
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unsigned long last_cumul_size;
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u8 value;
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u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
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u32 cumul_size;
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int index;
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drc_ddim = (drc >> 18) & 0x1;
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last_cumul_size = 0;
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/* The dram row boundary (DRB) reg values are boundary address
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* for each DRAM row with a granularity of 32 or 64MB (single/dual
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* channel operation). DRB regs are cumulative; therefore DRB7 will
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* contain the total memory contained in all eight rows.
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*/
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for (index = 0; index < mci->nr_csrows; index++) {
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csrow = &mci->csrows[index];
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value = readb(ovrfl_window + I82875P_DRB + index);
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cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
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debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
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cumul_size);
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if (cumul_size == last_cumul_size)
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continue; /* not populated */
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csrow->first_page = last_cumul_size;
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csrow->last_page = cumul_size - 1;
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csrow->nr_pages = cumul_size - last_cumul_size;
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last_cumul_size = cumul_size;
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csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
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csrow->mtype = MEM_DDR;
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csrow->dtype = DEV_UNKNOWN;
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csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
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}
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}
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static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
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{
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int rc = -ENODEV;
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struct mem_ctl_info *mci;
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struct i82875p_pvt *pvt;
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struct pci_dev *ovrfl_pdev;
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void __iomem *ovrfl_window;
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u32 drc;
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u32 nr_chans;
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struct i82875p_error_info discard;
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debugf0("%s()\n", __func__);
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ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
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if (i82875p_setup_overfl_dev(pdev, &ovrfl_pdev, &ovrfl_window))
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return -ENODEV;
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drc = readl(ovrfl_window + I82875P_DRC);
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nr_chans = dual_channel_active(drc) + 1;
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mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
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nr_chans);
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if (!mci) {
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rc = -ENOMEM;
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goto fail2;
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goto fail0;
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}
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debugf3("%s(): init mci\n", __func__);
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@@ -347,8 +413,6 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
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mci->mtype_cap = MEM_FLAG_DDR;
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mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
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mci->edac_cap = EDAC_FLAG_UNKNOWN;
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/* adjust FLAGS */
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mci->mod_name = EDAC_MOD_STR;
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mci->mod_ver = I82875P_REVISION;
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mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
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@@ -358,36 +422,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
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pvt = (struct i82875p_pvt *) mci->pvt_info;
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pvt->ovrfl_pdev = ovrfl_pdev;
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pvt->ovrfl_window = ovrfl_window;
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/*
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* The dram row boundary (DRB) reg values are boundary address
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* for each DRAM row with a granularity of 32 or 64MB (single/dual
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* channel operation). DRB regs are cumulative; therefore DRB7 will
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* contain the total memory contained in all eight rows.
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*/
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for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
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u8 value;
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u32 cumul_size;
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struct csrow_info *csrow = &mci->csrows[index];
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value = readb(ovrfl_window + I82875P_DRB + index);
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cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
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debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
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cumul_size);
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if (cumul_size == last_cumul_size)
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continue; /* not populated */
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csrow->first_page = last_cumul_size;
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csrow->last_page = cumul_size - 1;
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csrow->nr_pages = cumul_size - last_cumul_size;
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last_cumul_size = cumul_size;
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csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
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csrow->mtype = MEM_DDR;
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csrow->dtype = DEV_UNKNOWN;
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csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
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}
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i82875p_init_csrows(mci, pdev, ovrfl_window, drc);
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i82875p_get_error_info(mci, &discard); /* clear counters */
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/* Here we assume that we will never see multiple instances of this
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@@ -395,25 +430,20 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
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*/
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if (edac_mc_add_mc(mci,0)) {
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debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
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goto fail3;
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goto fail1;
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}
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/* get this far and it's successful */
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debugf3("%s(): success\n", __func__);
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return 0;
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fail3:
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fail1:
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edac_mc_free(mci);
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fail2:
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fail0:
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iounmap(ovrfl_window);
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fail1:
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pci_release_regions(ovrfl_pdev);
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#ifdef CORRECT_BIOS
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fail0:
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#endif
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pci_disable_device(ovrfl_pdev);
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/* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
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return rc;
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