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net/mlx5: Fix PPLM register mapping

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[ Upstream commit ce28f0fd670ddffcd564ce7119bdefbaf08f02d3 ]

Add reserved mapping to cover all the register in order to avoid
setting arbitrary values to newer FW which implements the reserved
fields.

Fixes: a58837f52d ("net/mlx5e: Expose FEC feilds and related capability bit")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Aya Levin
2021-04-04 10:50:50 +03:00
committed by Greg Kroah-Hartman
parent f92faf0bdd
commit 1312f11eb3
1 changed files with 2 additions and 0 deletions
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include/linux/mlx5/mlx5_ifc.h
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@@ -8719,6 +8719,8 @@ struct mlx5_ifc_pplm_reg_bits {
u8 fec_override_admin_100g_2x[0x10];
u8 fec_override_admin_50g_1x[0x10];
u8 reserved_at_140[0x140];
};
struct mlx5_ifc_ppcnt_reg_bits {