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drm/i915: implement WaDisablePSDDualDispatchEnable on IVB & VLV

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Workaround for dual port PS dispatch on GT1.

v2: pull in register definition & offset handling
v3: use IVB GT1 macro to get the right regs (Ben)
v4: add for VLV too (Ben)
v5: don't read the reg, it's masked so we'll only enable the one extra bit (Chris)
v6: use a _GT2 suffix for the second reg (Chris)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Antti Koskipää <antti.koskipaa@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Jesse Barnes
2012-10-25 12:15:45 -07:00
committed by Daniel Vetter
parent 2d809570c8
commit 12f3382bc0
3 changed files with 17 additions and 0 deletions
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drivers/gpu/drm/i915/i915_drv.c
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@@ -1134,6 +1134,7 @@ static bool IS_DISPLAYREG(u32 reg)
switch (reg) {
case GEN7_ROW_CHICKEN2:
case GEN7_HALF_SLICE_CHICKEN1:
return false;
default:
break;