Merge tag 'mfd-for-linus-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones: "New Drivers: - Freescale Touch Screen ADC - X-Powers AXP PMIC with RSB - TI TPS65086 Power Management IC (PMIC) New Device Support: - Supply device PCI IDs for Intel Broxton Fix-ups: - Move to clkdev_create() API; intel_quark_i2c_gpio - Complete re-write of TI's TPS65912 Power Management IC (PMIC) - Remove unnecessary function argument; axp20x - Separate out bus related code; axp20x - Coding Style changes; axp20x - Allow more drivers to be compiled as modules - Work around false positive 'used uninitialised' warning; db8500-prcmu Bug Fixes: - Remove do_div(); fsl-imx25-gcq - Fix driver init when built-in; tps65010 - Fix clock-unregister leak; intel-lpss" * tag 'mfd-for-linus-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (53 commits) mfd: intel-lpss: Pass I2C configuration via properties on BXT mfd: imx6sx: Add PCIe register definitions for iomuxc gpr mfd: ipaq-micro: Use __maybe_unused to hide pm functions mfd: max77686: Add max77802 to I2C device ID table mfd: max77686: Export OF module alias information mfd: max77686: Allow driver to be built as a module mfd: stmpe: Add the proper PWM resources mfd: tps65090: Set regmap config reg counts properly mfd: syscon: Return ENOTSUPP instead of ENOSYS when disabled mfd: as3711: Set regmap config reg counts properly mfd: rc5t583: Set regmap config reg counts properly gpio: tps65086: Add GPO driver for the TPS65086 PMIC mfd: mt6397: Add platform device ID table mfd: da9063: Fix missing volatile registers in the core regmap_range volatile lists mfd: mt6397: Add MT6323 support to MT6397 driver mfd: mt6397: Add support for different Slave types mfd: mt6397: int_con and int_status may vary in location dt-bindings: mfd: Add bindings for the MediaTek MT6323 PMIC mfd: da9062: Fix missing volatile registers in the core regmap_range volatile lists mfd: Add documentation for ACT8945A DT bindings ...
This commit is contained in:
Linus Torvalds
@@ -194,6 +194,13 @@ config EXYNOS_ADC
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To compile this driver as a module, choose M here: the module will be
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called exynos_adc.
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config FSL_MX25_ADC
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tristate "Freescale MX25 ADC driver"
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depends on MFD_MX25_TSADC
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help
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Generic Conversion Queue driver used for general purpose ADC in the
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MX25. This driver supports single measurements using the MX25 ADC.
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config HI8435
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tristate "Holt Integrated Circuits HI-8435 threshold detector"
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select IIO_TRIGGERED_EVENT
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@@ -20,6 +20,7 @@ obj-$(CONFIG_BERLIN2_ADC) += berlin2-adc.o
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obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o
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obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o
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obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
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obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
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obj-$(CONFIG_HI8435) += hi8435.o
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obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o
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obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o
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417
drivers/iio/adc/fsl-imx25-gcq.c
Normal file
417
drivers/iio/adc/fsl-imx25-gcq.c
Normal file
@@ -0,0 +1,417 @@
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/*
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* Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*
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* This is the driver for the imx25 GCQ (Generic Conversion Queue)
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* connected to the imx25 ADC.
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*/
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#include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
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#include <linux/clk.h>
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#include <linux/iio/iio.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/imx25-tsadc.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))
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static const char * const driver_name = "mx25-gcq";
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enum mx25_gcq_cfgs {
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MX25_CFG_XP = 0,
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MX25_CFG_YP,
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MX25_CFG_XN,
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MX25_CFG_YN,
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MX25_CFG_WIPER,
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MX25_CFG_INAUX0,
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MX25_CFG_INAUX1,
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MX25_CFG_INAUX2,
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MX25_NUM_CFGS,
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};
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struct mx25_gcq_priv {
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struct regmap *regs;
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struct completion completed;
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struct clk *clk;
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int irq;
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struct regulator *vref[4];
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u32 channel_vref_mv[MX25_NUM_CFGS];
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};
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#define MX25_CQG_CHAN(chan, id) {\
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.type = IIO_VOLTAGE,\
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.indexed = 1,\
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.channel = chan,\
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE),\
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.datasheet_name = id,\
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}
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static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {
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MX25_CQG_CHAN(MX25_CFG_XP, "xp"),
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MX25_CQG_CHAN(MX25_CFG_YP, "yp"),
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MX25_CQG_CHAN(MX25_CFG_XN, "xn"),
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MX25_CQG_CHAN(MX25_CFG_YN, "yn"),
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MX25_CQG_CHAN(MX25_CFG_WIPER, "wiper"),
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MX25_CQG_CHAN(MX25_CFG_INAUX0, "inaux0"),
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MX25_CQG_CHAN(MX25_CFG_INAUX1, "inaux1"),
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MX25_CQG_CHAN(MX25_CFG_INAUX2, "inaux2"),
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};
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static const char * const mx25_gcq_refp_names[] = {
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[MX25_ADC_REFP_YP] = "yp",
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[MX25_ADC_REFP_XP] = "xp",
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[MX25_ADC_REFP_INT] = "int",
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[MX25_ADC_REFP_EXT] = "ext",
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};
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static irqreturn_t mx25_gcq_irq(int irq, void *data)
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{
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struct mx25_gcq_priv *priv = data;
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u32 stats;
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regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
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if (stats & MX25_ADCQ_SR_EOQ) {
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regmap_update_bits(priv->regs, MX25_ADCQ_MR,
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MX25_ADCQ_MR_EOQ_IRQ, MX25_ADCQ_MR_EOQ_IRQ);
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complete(&priv->completed);
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}
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/* Disable conversion queue run */
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regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
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/* Acknowledge all possible irqs */
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regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
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MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |
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MX25_ADCQ_SR_EOQ | MX25_ADCQ_SR_PD);
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return IRQ_HANDLED;
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}
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static int mx25_gcq_get_raw_value(struct device *dev,
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struct iio_chan_spec const *chan,
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struct mx25_gcq_priv *priv,
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int *val)
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{
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long timeout;
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u32 data;
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/* Setup the configuration we want to use */
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regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
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MX25_ADCQ_ITEM(0, chan->channel));
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regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);
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/* Trigger queue for one run */
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regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
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MX25_ADCQ_CR_FQS);
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timeout = wait_for_completion_interruptible_timeout(
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&priv->completed, MX25_GCQ_TIMEOUT);
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if (timeout < 0) {
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dev_err(dev, "ADC wait for measurement failed\n");
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return timeout;
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} else if (timeout == 0) {
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dev_err(dev, "ADC timed out\n");
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return -ETIMEDOUT;
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}
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regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);
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*val = MX25_ADCQ_FIFO_DATA(data);
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return IIO_VAL_INT;
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}
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static int mx25_gcq_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val,
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int *val2, long mask)
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{
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struct mx25_gcq_priv *priv = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&indio_dev->mlock);
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ret = mx25_gcq_get_raw_value(&indio_dev->dev, chan, priv, val);
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mutex_unlock(&indio_dev->mlock);
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return ret;
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case IIO_CHAN_INFO_SCALE:
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*val = priv->channel_vref_mv[chan->channel];
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*val2 = 12;
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return IIO_VAL_FRACTIONAL_LOG2;
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default:
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return -EINVAL;
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}
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}
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static const struct iio_info mx25_gcq_iio_info = {
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.read_raw = mx25_gcq_read_raw,
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};
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static const struct regmap_config mx25_gcq_regconfig = {
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.max_register = 0x5c,
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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};
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static int mx25_gcq_setup_cfgs(struct platform_device *pdev,
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struct mx25_gcq_priv *priv)
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{
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struct device_node *np = pdev->dev.of_node;
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struct device_node *child;
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struct device *dev = &pdev->dev;
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unsigned int refp_used[4] = {};
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int ret, i;
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/*
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* Setup all configurations registers with a default conversion
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* configuration for each input
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*/
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for (i = 0; i < MX25_NUM_CFGS; ++i)
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regmap_write(priv->regs, MX25_ADCQ_CFG(i),
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MX25_ADCQ_CFG_YPLL_OFF |
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MX25_ADCQ_CFG_XNUR_OFF |
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MX25_ADCQ_CFG_XPUL_OFF |
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MX25_ADCQ_CFG_REFP_INT |
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MX25_ADCQ_CFG_IN(i) |
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MX25_ADCQ_CFG_REFN_NGND2);
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/*
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* First get all regulators to store them in channel_vref_mv if
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* necessary. Later we use that information for proper IIO scale
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* information.
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*/
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priv->vref[MX25_ADC_REFP_INT] = NULL;
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priv->vref[MX25_ADC_REFP_EXT] =
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devm_regulator_get_optional(&pdev->dev, "vref-ext");
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priv->vref[MX25_ADC_REFP_XP] =
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devm_regulator_get_optional(&pdev->dev, "vref-xp");
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priv->vref[MX25_ADC_REFP_YP] =
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devm_regulator_get_optional(&pdev->dev, "vref-yp");
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for_each_child_of_node(np, child) {
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u32 reg;
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u32 refp = MX25_ADCQ_CFG_REFP_INT;
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u32 refn = MX25_ADCQ_CFG_REFN_NGND2;
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ret = of_property_read_u32(child, "reg", ®);
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if (ret) {
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dev_err(dev, "Failed to get reg property\n");
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return ret;
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}
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if (reg >= MX25_NUM_CFGS) {
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dev_err(dev,
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"reg value is greater than the number of available configuration registers\n");
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return -EINVAL;
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}
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of_property_read_u32(child, "fsl,adc-refp", &refp);
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of_property_read_u32(child, "fsl,adc-refn", &refn);
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switch (refp) {
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case MX25_ADC_REFP_EXT:
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case MX25_ADC_REFP_XP:
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case MX25_ADC_REFP_YP:
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if (IS_ERR(priv->vref[refp])) {
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dev_err(dev, "Error, trying to use external voltage reference without a vref-%s regulator.",
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mx25_gcq_refp_names[refp]);
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return PTR_ERR(priv->vref[refp]);
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}
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priv->channel_vref_mv[reg] =
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regulator_get_voltage(priv->vref[refp]);
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/* Conversion from uV to mV */
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priv->channel_vref_mv[reg] /= 1000;
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break;
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case MX25_ADC_REFP_INT:
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priv->channel_vref_mv[reg] = 2500;
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||||
break;
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default:
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dev_err(dev, "Invalid positive reference %d\n", refp);
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||||
return -EINVAL;
|
||||
}
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|
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++refp_used[refp];
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|
||||
/*
|
||||
* Shift the read values to the correct positions within the
|
||||
* register.
|
||||
*/
|
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refp = MX25_ADCQ_CFG_REFP(refp);
|
||||
refn = MX25_ADCQ_CFG_REFN(refn);
|
||||
|
||||
if ((refp & MX25_ADCQ_CFG_REFP_MASK) != refp) {
|
||||
dev_err(dev, "Invalid fsl,adc-refp property value\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
if ((refn & MX25_ADCQ_CFG_REFN_MASK) != refn) {
|
||||
dev_err(dev, "Invalid fsl,adc-refn property value\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),
|
||||
MX25_ADCQ_CFG_REFP_MASK |
|
||||
MX25_ADCQ_CFG_REFN_MASK,
|
||||
refp | refn);
|
||||
}
|
||||
regmap_update_bits(priv->regs, MX25_ADCQ_CR,
|
||||
MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,
|
||||
MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);
|
||||
|
||||
regmap_write(priv->regs, MX25_ADCQ_CR,
|
||||
MX25_ADCQ_CR_PDMSK | MX25_ADCQ_CR_QSM_FQS);
|
||||
|
||||
/* Remove unused regulators */
|
||||
for (i = 0; i != 4; ++i) {
|
||||
if (!refp_used[i]) {
|
||||
if (!IS_ERR_OR_NULL(priv->vref[i]))
|
||||
devm_regulator_put(priv->vref[i]);
|
||||
priv->vref[i] = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mx25_gcq_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct iio_dev *indio_dev;
|
||||
struct mx25_gcq_priv *priv;
|
||||
struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);
|
||||
struct device *dev = &pdev->dev;
|
||||
struct resource *res;
|
||||
void __iomem *mem;
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
priv = iio_priv(indio_dev);
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
mem = devm_ioremap_resource(dev, res);
|
||||
if (IS_ERR(mem))
|
||||
return PTR_ERR(mem);
|
||||
|
||||
priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);
|
||||
if (IS_ERR(priv->regs)) {
|
||||
dev_err(dev, "Failed to initialize regmap\n");
|
||||
return PTR_ERR(priv->regs);
|
||||
}
|
||||
|
||||
init_completion(&priv->completed);
|
||||
|
||||
ret = mx25_gcq_setup_cfgs(pdev, priv);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (i = 0; i != 4; ++i) {
|
||||
if (!priv->vref[i])
|
||||
continue;
|
||||
|
||||
ret = regulator_enable(priv->vref[i]);
|
||||
if (ret)
|
||||
goto err_regulator_disable;
|
||||
}
|
||||
|
||||
priv->clk = tsadc->clk;
|
||||
ret = clk_prepare_enable(priv->clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to enable clock\n");
|
||||
goto err_vref_disable;
|
||||
}
|
||||
|
||||
priv->irq = platform_get_irq(pdev, 0);
|
||||
if (priv->irq <= 0) {
|
||||
dev_err(dev, "Failed to get IRQ\n");
|
||||
ret = priv->irq;
|
||||
if (!ret)
|
||||
ret = -ENXIO;
|
||||
goto err_clk_unprepare;
|
||||
}
|
||||
|
||||
ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name, priv);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed requesting IRQ\n");
|
||||
goto err_clk_unprepare;
|
||||
}
|
||||
|
||||
indio_dev->dev.parent = &pdev->dev;
|
||||
indio_dev->channels = mx25_gcq_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels);
|
||||
indio_dev->info = &mx25_gcq_iio_info;
|
||||
indio_dev->name = driver_name;
|
||||
|
||||
ret = iio_device_register(indio_dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to register iio device\n");
|
||||
goto err_irq_free;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, indio_dev);
|
||||
|
||||
return 0;
|
||||
|
||||
err_irq_free:
|
||||
free_irq(priv->irq, priv);
|
||||
err_clk_unprepare:
|
||||
clk_disable_unprepare(priv->clk);
|
||||
err_vref_disable:
|
||||
i = 4;
|
||||
err_regulator_disable:
|
||||
for (; i-- > 0;) {
|
||||
if (priv->vref[i])
|
||||
regulator_disable(priv->vref[i]);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mx25_gcq_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
|
||||
struct mx25_gcq_priv *priv = iio_priv(indio_dev);
|
||||
int i;
|
||||
|
||||
iio_device_unregister(indio_dev);
|
||||
free_irq(priv->irq, priv);
|
||||
clk_disable_unprepare(priv->clk);
|
||||
for (i = 4; i-- > 0;) {
|
||||
if (priv->vref[i])
|
||||
regulator_disable(priv->vref[i]);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id mx25_gcq_ids[] = {
|
||||
{ .compatible = "fsl,imx25-gcq", },
|
||||
{ /* Sentinel */ }
|
||||
};
|
||||
|
||||
static struct platform_driver mx25_gcq_driver = {
|
||||
.driver = {
|
||||
.name = "mx25-gcq",
|
||||
.of_match_table = mx25_gcq_ids,
|
||||
},
|
||||
.probe = mx25_gcq_probe,
|
||||
.remove = mx25_gcq_remove,
|
||||
};
|
||||
module_platform_driver(mx25_gcq_driver);
|
||||
|
||||
MODULE_DESCRIPTION("ADC driver for Freescale mx25");
|
||||
MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Reference in New Issue
Block a user