Merge branch 'perfcounters-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perfcounters-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (49 commits) perfcounter: Handle some IO return values perf_counter: Push perf_sample_data through the swcounter code perf_counter tools: Define and use our own u64, s64 etc. definitions perf_counter: Close race in perf_lock_task_context() perf_counter, x86: Improve interactions with fast-gup perf_counter: Simplify and fix task migration counting perf_counter tools: Add a data file header perf_counter: Update userspace callchain sampling uses perf_counter: Make callchain samples extensible perf report: Filter to parent set by default perf_counter tools: Handle lost events perf_counter: Add event overlow handling fs: Provide empty .set_page_dirty() aop for anon inodes perf_counter: tools: Makefile tweaks for 64-bit powerpc perf_counter: powerpc: Add processor back-end for MPC7450 family perf_counter: powerpc: Make powerpc perf_counter code safe for 32-bit kernels perf_counter: powerpc: Change how processor-specific back-ends get selected perf_counter: powerpc: Use unsigned long for register and constraint values perf_counter: powerpc: Enable use of software counters on 32-bit powerpc perf_counter tools: Add and use isprint() ...
This commit is contained in:
Linus Torvalds
@@ -19,6 +19,7 @@
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#include <linux/kdebug.h>
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#include <linux/sched.h>
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#include <linux/uaccess.h>
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#include <linux/highmem.h>
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#include <asm/apic.h>
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#include <asm/stacktrace.h>
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@@ -389,23 +390,23 @@ static u64 intel_pmu_raw_event(u64 event)
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return event & CORE_EVNTSEL_MASK;
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}
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static const u64 amd_0f_hw_cache_event_ids
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static const u64 amd_hw_cache_event_ids
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[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_RESULT_MAX] =
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{
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[ C(L1D) ] = {
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[ C(OP_READ) ] = {
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[ C(RESULT_ACCESS) ] = 0,
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[ C(RESULT_MISS) ] = 0,
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[ C(RESULT_ACCESS) ] = 0x0040, /* Data Cache Accesses */
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[ C(RESULT_MISS) ] = 0x0041, /* Data Cache Misses */
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = 0,
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[ C(RESULT_ACCESS) ] = 0x0042, /* Data Cache Refills from L2 */
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[ C(RESULT_MISS) ] = 0,
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},
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[ C(OP_PREFETCH) ] = {
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[ C(RESULT_ACCESS) ] = 0,
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[ C(RESULT_MISS) ] = 0,
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[ C(RESULT_ACCESS) ] = 0x0267, /* Data Prefetcher :attempts */
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[ C(RESULT_MISS) ] = 0x0167, /* Data Prefetcher :cancelled */
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},
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},
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[ C(L1I ) ] = {
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@@ -418,17 +419,17 @@ static const u64 amd_0f_hw_cache_event_ids
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[ C(RESULT_MISS) ] = -1,
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},
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[ C(OP_PREFETCH) ] = {
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[ C(RESULT_ACCESS) ] = 0,
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[ C(RESULT_ACCESS) ] = 0x014B, /* Prefetch Instructions :Load */
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[ C(RESULT_MISS) ] = 0,
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},
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},
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[ C(LL ) ] = {
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[ C(OP_READ) ] = {
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[ C(RESULT_ACCESS) ] = 0,
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[ C(RESULT_MISS) ] = 0,
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[ C(RESULT_ACCESS) ] = 0x037D, /* Requests to L2 Cache :IC+DC */
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[ C(RESULT_MISS) ] = 0x037E, /* L2 Cache Misses : IC+DC */
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = 0,
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[ C(RESULT_ACCESS) ] = 0x017F, /* L2 Fill/Writeback */
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[ C(RESULT_MISS) ] = 0,
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},
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[ C(OP_PREFETCH) ] = {
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@@ -438,8 +439,8 @@ static const u64 amd_0f_hw_cache_event_ids
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},
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[ C(DTLB) ] = {
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[ C(OP_READ) ] = {
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[ C(RESULT_ACCESS) ] = 0,
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[ C(RESULT_MISS) ] = 0,
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[ C(RESULT_ACCESS) ] = 0x0040, /* Data Cache Accesses */
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[ C(RESULT_MISS) ] = 0x0046, /* L1 DTLB and L2 DLTB Miss */
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = 0,
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@@ -1223,6 +1224,8 @@ again:
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if (!intel_pmu_save_and_restart(counter))
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continue;
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data.period = counter->hw.last_period;
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if (perf_counter_overflow(counter, 1, &data))
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intel_pmu_disable_counter(&counter->hw, bit);
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}
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@@ -1459,18 +1462,16 @@ static int intel_pmu_init(void)
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static int amd_pmu_init(void)
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{
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/* Performance-monitoring supported from K7 and later: */
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if (boot_cpu_data.x86 < 6)
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return -ENODEV;
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x86_pmu = amd_pmu;
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switch (boot_cpu_data.x86) {
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case 0x0f:
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case 0x10:
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case 0x11:
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memcpy(hw_cache_event_ids, amd_0f_hw_cache_event_ids,
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sizeof(hw_cache_event_ids));
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/* Events are common for all AMDs */
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memcpy(hw_cache_event_ids, amd_hw_cache_event_ids,
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sizeof(hw_cache_event_ids));
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pr_cont("AMD Family 0f/10/11 events, ");
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break;
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}
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return 0;
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}
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@@ -1554,9 +1555,9 @@ const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
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*/
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static inline
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void callchain_store(struct perf_callchain_entry *entry, unsigned long ip)
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void callchain_store(struct perf_callchain_entry *entry, u64 ip)
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{
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if (entry->nr < MAX_STACK_DEPTH)
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if (entry->nr < PERF_MAX_STACK_DEPTH)
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entry->ip[entry->nr++] = ip;
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}
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@@ -1577,8 +1578,8 @@ static void backtrace_warning(void *data, char *msg)
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static int backtrace_stack(void *data, char *name)
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{
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/* Don't bother with IRQ stacks for now */
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return -1;
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/* Process all stacks: */
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return 0;
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}
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static void backtrace_address(void *data, unsigned long addr, int reliable)
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@@ -1596,47 +1597,59 @@ static const struct stacktrace_ops backtrace_ops = {
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.address = backtrace_address,
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};
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#include "../dumpstack.h"
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static void
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perf_callchain_kernel(struct pt_regs *regs, struct perf_callchain_entry *entry)
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{
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unsigned long bp;
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char *stack;
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int nr = entry->nr;
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callchain_store(entry, PERF_CONTEXT_KERNEL);
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callchain_store(entry, regs->ip);
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callchain_store(entry, instruction_pointer(regs));
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stack = ((char *)regs + sizeof(struct pt_regs));
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#ifdef CONFIG_FRAME_POINTER
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bp = frame_pointer(regs);
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#else
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bp = 0;
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#endif
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dump_trace(NULL, regs, (void *)stack, bp, &backtrace_ops, entry);
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entry->kernel = entry->nr - nr;
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dump_trace(NULL, regs, NULL, 0, &backtrace_ops, entry);
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}
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/*
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* best effort, GUP based copy_from_user() that assumes IRQ or NMI context
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*/
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static unsigned long
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copy_from_user_nmi(void *to, const void __user *from, unsigned long n)
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{
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unsigned long offset, addr = (unsigned long)from;
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int type = in_nmi() ? KM_NMI : KM_IRQ0;
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unsigned long size, len = 0;
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struct page *page;
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void *map;
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int ret;
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struct stack_frame {
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const void __user *next_fp;
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unsigned long return_address;
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};
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do {
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ret = __get_user_pages_fast(addr, 1, 0, &page);
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if (!ret)
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break;
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offset = addr & (PAGE_SIZE - 1);
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size = min(PAGE_SIZE - offset, n - len);
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map = kmap_atomic(page, type);
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memcpy(to, map+offset, size);
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kunmap_atomic(map, type);
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put_page(page);
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len += size;
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to += size;
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addr += size;
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} while (len < n);
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return len;
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}
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static int copy_stack_frame(const void __user *fp, struct stack_frame *frame)
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{
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int ret;
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unsigned long bytes;
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if (!access_ok(VERIFY_READ, fp, sizeof(*frame)))
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return 0;
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bytes = copy_from_user_nmi(frame, fp, sizeof(*frame));
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ret = 1;
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pagefault_disable();
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if (__copy_from_user_inatomic(frame, fp, sizeof(*frame)))
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ret = 0;
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pagefault_enable();
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return ret;
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return bytes == sizeof(*frame);
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}
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static void
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@@ -1644,28 +1657,28 @@ perf_callchain_user(struct pt_regs *regs, struct perf_callchain_entry *entry)
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{
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struct stack_frame frame;
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const void __user *fp;
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int nr = entry->nr;
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regs = (struct pt_regs *)current->thread.sp0 - 1;
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fp = (void __user *)regs->bp;
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if (!user_mode(regs))
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regs = task_pt_regs(current);
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fp = (void __user *)regs->bp;
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callchain_store(entry, PERF_CONTEXT_USER);
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callchain_store(entry, regs->ip);
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while (entry->nr < MAX_STACK_DEPTH) {
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frame.next_fp = NULL;
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while (entry->nr < PERF_MAX_STACK_DEPTH) {
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frame.next_frame = NULL;
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frame.return_address = 0;
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if (!copy_stack_frame(fp, &frame))
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break;
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if ((unsigned long)fp < user_stack_pointer(regs))
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if ((unsigned long)fp < regs->sp)
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break;
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callchain_store(entry, frame.return_address);
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fp = frame.next_fp;
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fp = frame.next_frame;
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}
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entry->user = entry->nr - nr;
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}
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static void
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@@ -1701,9 +1714,6 @@ struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
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entry = &__get_cpu_var(irq_entry);
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entry->nr = 0;
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entry->hv = 0;
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entry->kernel = 0;
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entry->user = 0;
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perf_do_callchain(regs, entry);
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