net: stmmac: Parse FIFO sizes from feature registers
New version of this core encode the FIFO sizes in one of the feature registers. Use these sizes as default, but still allow device tree to override them for backwards compatibility. Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller

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937071c171
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11fbf811c8
@@ -148,6 +148,8 @@ enum power_event {
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/* MAC HW features1 bitmap */
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#define GMAC_HW_FEAT_AVSEL BIT(20)
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#define GMAC_HW_TSOEN BIT(18)
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#define GMAC_HW_TXFIFOSIZE GENMASK(10, 6)
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#define GMAC_HW_RXFIFOSIZE GENMASK(4, 0)
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/* MAC HW features2 bitmap */
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#define GMAC_HW_FEAT_TXCHCNT GENMASK(21, 18)
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